Design Rvw: Isolated 50 W Flyback Converter Using …

1 APPLICATION NOTE U-165 Lisa DinwoodieDesign Review: Isolated 50 watt Flyback ConverterUsing the UCC3809 Primary Side Con-troller and the UC3965 PrecisionReference and Error Amplifier2U- 165 design Review: Isolated 50 watt Flyback Converter Using the UCC3809 Primary SideController and the UC3965 Precision reference and Error AmplifierBy Lisa DinwoodieABSTRACTThe Flyback power stage is a popular choice for single and multiple output dc-to-dc converters at powerlevels of 150 Watts or less. Without the output inductor required in buck derived topologies, such as theforward or push-pull Converter , the component count and cost are reduced. This application note will re-view the Design procedure for the power stage and control electronics of a Flyback Converter . In these iso-lated converters, the error signal from the secondary still needs to cross the isolation boundary to achieveregulation. By Using the UC3965 Precision reference with Low Offset Error Amplifier on the secondaryside to drive an optocoupler and the UCC3809 Economy Primary Side Controller on the primary side, asimple and low cost 50 watt Isolated power supply is Flyback Converter reviewed in this applicationnote, and available as a demonstration board( demo board ), is specifically designed to interfacewith the voltage ranges used in the telecommuni-cations industry.

2 The primary goal of this 5V, 50 watt power supply is an efficient Design whichmeets all the specifications while maintaining lowcost. This goal is achieved by Using the UCC3809on the primary side for fixed frequency currentmode control and Using the error amplifier and pre-cision reference of the UC3965 on the secondaryside. Each of these 8-pin integrated circuits re-quires minimal external parts resulting in an eco-nomical yet effective Design . The demo boardschematic is shown in Figure 1 and the list of ma-terials is tabulated on page H5 VINC31 F+VINC2150 FC1150 FR1227K12345678UC3965 GNDVOUTVCCOFFSET FC111 FC2147 FR1510KC14470pFR214751% HC2033 F10VV0+5 VSGND2 SGND1 PGND2 PGND2 PGND1 Figure 1. Schematic diagram of the 48V to +5V Flyback Converter available as a demo SUPPLY SPECIFICATIONSI nput VoltageRange: 72 VDC to 32 VDC( 48 VDC nominal)Output Voltage:+5 VDCLoad:0A to 10 ARegulation: 2% Over Load, Line, andTemperatureIsolation:1500 VRMSDESIGNING THE POWER STAGEF lyback TopologyThere are many standard power Converter topolo-gies available to choose from, each with its advan-tagesanddisadvantages[1].

3 Aftercarefulconsideration, taking into account factors such aslow power, simplicity, isolation, input and output rip-ple currents, and low cost, the Flyback configurationwas chosen. The basic Flyback Converter topologyis shown in Figure MethodVoltage mode control was past over in favor of cur-rent mode control because current mode controlresponds immediately to line voltage changes andprovides inherent over current protection for theswitching device. Traditional peak current modecontrol compares the amplified output voltage errorwith the primary inductor current signal. Using theUCC3809 pulse width modulator (PWM) as thecontroller, the amplified output voltage error andthe primary inductor current ramp are summed andcompared to a 1V threshold. The inner current con-trol loop contains a small current sense resistorwhich senses the primary inductor current. The re-sistor transforms this current waveform into a volt-age signal that is fed directly into the primary sidePWM comparator.

4 This inner loop determines theresponse to input voltage changes. The outer volt-age control loop involves comparing a portion ofthe output voltage to a reference voltage at the in-put of the secondary side error amplifier. This di-vided down output voltage drives the invertinginput to the error amplifier in the UC3965 whichthen drives an internal inverting output buffer. Theresulting output then drives an optocoupler. Theoptocoupler output is also fed directly into the pri-mary side PWM comparator. As the output voltageincreases above the desired level, the optocoupleris driven harder on, forcing the PWM comparator toshut off the gate drive to the switching outer loop determines the response to current mode control requires simpler com-pensation, has pulse-by-pulse current limiting, andhas better load current regulation. Because thesecondary currents are already quite large, contin-uous conduction mode (CCM) was chosen.

5 Pri-mary and secondary RMS currents can be up totwo times higher for discontinuous mode than forCCM. Discontinuous conduction mode would re-quire Using a transistor with a higher current the output ripple current is less than itwould be if discontinuous mode were used, theoutput capacitors are conduction mode has the disadvan-tage of requiring a higher magnetizing inductanceto stay in CCM throughout the entire operatingrange and a right-half-plane zero in its transferfunction. Feedback loop stabilization will be dis-cussed in a later Duty Cycle and Turns RatioNow that the topology ( Flyback ) and control method(peak current mode control) have been decidedupon, the next decision to be made is what themaximum duty cycle, Dmax, should be. The dutycycle is the ratio of on-time of Q1, Figure 2, to totalperiod, orD=ton/ T. In a CCM Flyback converterthe maximum duty cycle will determine the turnsratio of the transformer and impact the maximumvoltage stress on the switching element.

6 For thisdesign, a maximum duty cycle of 45% was se-lected. Limiting the duty cycle increases the num-ber of controller ICs to chose from because manyavailable today have maximum duty cycle limita-tions of 50%.The DC transfer function of a CCM Flyback con-verter is:COUTVOUTISILOADNSNPIPVINDSQ1GD1 Figure 2. Flyback Converter NDDODINRds on+= (min)()maxmax 11(1)where VOequals the output voltage, 5V,VD= forward voltage drop across rectifier D1, as-sumed to be ,VIN= 32 to 72V, VIN(min)= 32V,VRds(on)= on voltage drop across MOSFET Q1,equal to Rds(on) IRMS(primary), assumed to be 1V,N = turns ratio, equal to NP/NS,NS= number of transformer secondary turns,NP= number of transformer primary turns,D = duty duty cycle, , occurs at minimum in-put voltage. Substituting these values into (1) givesus a turns ratio of The turns ratio is inverselyproportional to the peak primary current, IPEAK,butdirectly proportional to the voltage stress on theswitching element.

7 So the peak currents will notbecome unreasonably high and the voltage stresson the MOSFET will be kept as low as possible,the turns ratio is rounded up only to the next inte-ger value, 5, or simply five primary turns for everyone secondary turn. Recalculating equation (1) re-sults in an actual Dmaxof 48%.Switching FrequencyBecause the magnetic components and filters willbe smaller, the tendency is to have as high aswitching frequency as possible. Unfortunately, thedecision is not quite that clear cut. Core losses,gate charge currents, and switching losses in-crease with higher switching frequencies; peak cur-rents and, consequently, I2R losses increase withlower switching frequencies. A compromise mustbe reached between component size, current lev-els, and acceptable losses. Synchronization withother systems and backward compatibility mayalso be deciding factors. For this Design , a fixedfrequency (fsw) of 70kHz was chosen.

8 At Dmaxequal to 48%, ton(max)becomes Design [2]The transformer in a Flyback Converter is actually acoupled inductor with multiple windings. Trans-formers provide coupling and isolation whereasinductors provide energy storage. The energystored in the air gap of the inductor is equal to:()ELIPPEAK= 22(2)where E is in Joules, LPis the primary inductancein Henries, and IPEAKis the peak primary current inAmperes. When the switch is on, D1 (from Figure2) is reverse biased due to the dot configuration ofthe transformer. No current flows in the secondarywindings and the current in the primary windingramps up at a rate of: ItVVLLINRdsP=(min)( on)(3)where VIN(min)and VRds(on)were defined previouslyand t is equal to ton(max)atVIN(min). The outputcapacitor, COUT, supplies all of the load current atthis time. Because the Converter is operating in thecontinuous conduction mode, ILis the change inthe inductor current which appears as a positiveslope ramp on a step.

9 The step is present becausethere is still current left in the secondary windingswhen the primary turns on. When the switch turnsoff, current flows through the secondary windingand D1 as a negative ramp on a step, replenishingCOUTand supplying current directly to the on (3), the primary inductance can be calcu-lated given an acceptable current ripple, demo board Design ,DILwas set to equalone-half the peak primary current. For a CCMflyback Design , the peak primary current is calcu-lated based upon (4).()IINDIPEAKOUTL= +maxmax 112 (4)By replacingDILwith (IPEAK), IOUT(max)with 10A,Dmaxwith , and N with 5 as detailed earlier,the peak primary current is calculated to be to The root meansquare, RMS, current of a ramp on a step wave-form is defined in (5) and calculates to be forthis application.()()()ItTIIII rmsonPEAKLPEAKL= + max 223 (5) Using (3), LPcalculates to approximately 80 to cost considerations and a switching fre-quency of 70kHz, the core material was chosen tobe manganese zinc ferrite 3C85 from Philips.

10 Be-6U-165cause the inductor ( the Flyback transformer)is driven in one quadrant of the B-H plane only, alarger core is required in a Flyback Design . Becausethis Converter is operating in the continuous con-duction mode at a relatively low frequency, themaximum peak flux density, Bmax, is limited by thesaturation flux density, Bsat. Taking all this intoconsideration, the minimum core size is deter-mined by (6).APLIIkBPPEAKrms= 104204131max.(6)where AP = the core area product in cm4,k = winding factor, equal to for a continuousmode Flyback ,Bmax Bsat, or Telsa for 3C85 material at100 result of (6) is compared to the product of thewinding area, Aw (cm2), and effective core area,Ae (cm2), listed in the core manufacturer s datasheet. For this Design , a Philips EFD30 core metthe minimum minimum number of primary turns is deter-mined by:NLIBAePPPEAK= 104max(7)Based upon this result and the predeterminedturns ratio, the number of secondary turns is estab-lished.