Device and Process Variability - IEEE Web Hosting

1 IEEE SCV-SF Electron devices Society SeminarDevice and Process VariabilityTomasz BrozekPDF Solutions Clara, 12 June 20172 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Outline Why does it matter Impact on parametric yield, speed, leakage Device Variability historical perspective and technology trends Sources of Variability and Process dependence Local Layout Effects and their Characterization Process Variability and Characterization eMetrology for better Process control in advanced nodes3 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Consequences of Device Variability Processor Speed Variability Excess Leakage Currents (IDDQ failures) SRAM Vmin marginSource: J. Farrell, AMD, C2S2 Workshop, UCB 2006 Balanced and dis-balanced Cells due to Vt mismatchSource: M.

2 Agostinelli, Intel, IRPS 20054 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Static Process VariationsAfter A Strojwas, Tutorial Variability and DFM , Short Course, VLSI Tech Symp , across the Wafer dielectric deposition thickness uniformity or Anneal , across the Die CMP uniformity (Gate height) or Die level Litho , local variation in CD (LER) or Dopant Atom count in the channel5 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Variability Decomposition Variability characterization and decomposition Provides information for Variability reductionAfter A Strojwas, Tutorial Variability and DFM , Short Course, VLSI Tech Symp 20146 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Example of Decomposition of Process Parameters Gate CD Variability Electrical Poly CD measurement 280 Measurements/Reticle FieldAfter: Prof.

3 C. Spanos Group SPIE 2003/20067 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Dynamic Variations After A Strojwas, Tutorial Variability and DFM , Short Course, VLSI Tech Symp 20148 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Dynamic Variability - Bias Temperature Instability Study of impact of aging on Device parametric Variability over multiple nodes Large number (>1000000/wafer) needed/used to generate statistics & model accurately Key observations / conclusions Fresh and stressed Device show a normal distributions Shift distributions have a tail which impacts lifetime prediction NBTI matching in PMOS is increasing with respect to time-zero matching. Similar root cause of the BTI behaviourSource: D. Angot, ST Micro, IEDM 20139 / IEEE SCV-SF Seminar June 2017 T.

4 Brozek - Variability Outline Why does it matter Impact on parametric yield, speed, etc Device Variability historical perspective and technology trends Sources of Variability and Process dependence Local Layout Effects and their Characterization Process Variability and Characterization eMetrology for better Process control in advanced nodes10 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Variability dependenceLWNTKV thoxox4)( =Metal gate/high-k enabled further scaling and reduced Variability , but introduced new sources of variationImproved by high-k & gate dielectric scalingLower doped substrates by using gate Mto set VTH Threshold Voltage Variability is a function of Device Size 1/sqrt(LW) Proportionality Coefficient depends on Tox and Channel Doping11 / IEEE SCV-SF Seminar June 2017 T.

5 Brozek - Variability Variation Trends: Random Variations Identical structure data presented here (no systematic layout dependent effects included) As expected, HKMG has reduced random , systematic layout pattern driven variations have increased 20nm very short nodeSource: Internal PDF BenchmarkAfter A Strojwas, Tutorial Variability and DFM , Short Course, VLSI Tech Symp 201412 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Variability reduction with HK-MG Demonstrated Variability improvement in 45 nmSource: Intel, IEDM 2007, TechJour., 200813 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Variability - Scaling TrendsAfter: Prof. A. Asenov, GSS, SC IEDM 201514 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability FinFET Device of choice for Advanced nodesAfter , U.

6 Florida, Device Tutorial, IEDM 201515 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Variability in FinFET parameter contribution Experimental study of effective current (Ieff) Variability in 14nm SOI FINFETs is reported which identifies: threshold voltage (Vtlin) external resistance (Rext) channel transconductance (Gm)as three independent sources of variation Gm Variability dominates overall Ieff Variability for 1-2 Fin Device , while Rext Variability becomes important for high Fin countAfter: A. Paul, GlobalFoundries/IBM, IEDM 201316 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Variability - Scaling Trends ( Device Architecture)After: V. Moroz, Synopsys, IEDM 201417 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Outline Why does it matter Impact on parametric yield, speed, etc Device Variability historical perspective and technology trends Sources of Variability and Process dependence Local Layout Effects and their Characterization Process Variability and Characterization eMetrology for better Process control in advanced nodes18 / IEEE SCV-SF Seminar June 2017 T.

7 Brozek - Variability FinFET Variability SourcesDevice Variability Fins (height and width) Fin neighborhood Fin density Fin order Fin angle Epi Growth Number of merged Fins Tuck/Untuck and Tuck PC neighborhood Gate (width and height) PC density PC cut Trench Contact Number of Fins in a Device Contact density Gate density Extensive Characterization NeedsSource: Chipworks Intel 22nm Trigate19 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Sources of Variability in FinFET Monte Carlo Simulations of 22nm and 14nm FinFETs to identify main contributors Random Gate Edge Roughness Metal Grains Random Dopants Systematic Fin Height Fin WidthAfter: Prof. A. Asenov, GSS, IEEE TED 2015 Source: Prof. A. Asenov, GSS, 201520 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Sources of Variability in FinFET Device Variability strongly depends on Process Integration and types of unitary Process /tool used to build the transistor Identification of sources of Variability helps to improve the Process and reduce variabilityAfter M.

8 Masahara, AIST, WIMNACT 201221 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Process Uniformity Optimization for FinFET Gate stack WFM and Gate height control are key features to control Systematic Vt Variability CMP uniformity across the Die and Wafer (Dummification and Density Control) Pre-Epi Fin Recess Variability contributes also to Vt variationSource: R. Pal, GlobalFoundries, IEDM 201522 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability LER and LWR Line Edge Roughness and Line Width Roughness increase as the geometrical pattern features decrease, become more important in scaled nodes Litho components - Acids in Chemically amplified resists and Polymer Chain Variability contribute to LERA fter C. Shin, Variation-Aware Advanced CMOS devices , Springer 2016 Spacer-Assisted Dual Patterning (SADP or SIT) can virtually eliminate LWRYK.

9 Choi, UCB, IEDM200223 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability FDSOI parallel path Alternative to FinFET to provide better electrostatic control Simpler integration less expensive Process Less sources of Variability24 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Fully Depleted devices - FinFET and FDSOIFDSOI shows very good potential for Variability reduction due to suppression of RDF and simpler Process flow compared to , VLSI 201525 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability FDSOI technology with reduced Variability Ultra Thin Body on Thin BOX reduced Vt roll-off (Short Channel Effects) Reduced RDF undoped channel High-K gate dielectric with Metal Gate .. increased sensitivity to Silicon Thickness variability26 / IEEE SCV-SF Seminar June 2017 T.

10 Brozek - Variability Outline Why does it matter Impact on parametric yield, speed, etc Device Variability historical perspective and technology trends Sources of Variability and Process dependence Local Layout Effects and their Characterization Process Variability and Characterization eMetrology for better Process control in advanced nodes27 / IEEE SCV-SF Seminar June 2017 T. Brozek - Variability Characterization Requirements for Layout Effects PCM/WAT structures are close to target (within 2%) But the product does not meet performance and/or yield targets Example from a 28nm HKMG technology in production Source: S. Saxena, PDF IEDM 20013 > 1400 design rule clean layouts Simulation of LPE extracted netlists, modeled layout effects included Each point is a median of > 450 devices Layout induced Variability is of the same magnitude as manufacturing variation28 / IEEE SCV-SF Seminar June 2017 T.