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DisplayPort DevCon Presentation, eDP, Dec 2010 v3 - VESA

No. of data & clock pairs Example: 1080p@60 Hz, 24bpp: 1 to 4 data pairs, no separate clock pairs 2 data pairs needed Higher count of data pairs Separate clock pair(s) needed 8 data pairs needed (8 data, 2 clock) (dual channel) Bit rate, per pair 1.6 , 2.7, or 5.4 Gbit/sec (fixed clock rate) Future extensible 945 Mbit/sec

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Transcription of DisplayPort DevCon Presentation, eDP, Dec 2010 v3 - VESA

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