EECE488: Analog CMOS Integrated Circuit Design ...

1 SM11 SMEECE 488 Set 1: introduction and BackgroundEECE488: Analog cmos Integrated Circuit DesignIntroduction and BackgroundShahriar MirabbasiDepartment of Electrical and Computer EngineeringUniversity of British contributions of Pedram Lajevardi in revising the slides is greatly 488 Set 1: introduction and BackgroundMarkingAssignments10% (4 to 6)Midterm15%Project25%Final Exam50%SM23 SMEECE 488 Set 1: introduction and BackgroundReferences Main reference: Lecture notes Recommended Textbook: Behzad Razavi, Design of Analog cmos Integrated Circuits, McGraw-Hill, 2001 Some other useful references: T. Chan Carusone, D. Johns and K. Martin, Analog Integrated CircuitDesign, 2ndEdition, John Wiley, 2011 P. Gray, P. Hurst, S. Lewis, and R. Meyer,Analysis and Design ofAnalog Integrated Circuits, 5thEdition, John Wiley, 2009 D. Holberg and P. Allen, cmos Analog Circuit Design , 3rdEdition,Oxford University Press, 2011 R. Jacob Baker, cmos Circuit Design , Layout, and Simulation, 3rdEdition, Wiley-IEEE Press, 2010 A.

2 Sedra and Smith,Microelectronic Circuits, 5thor 6thEdition,Oxford University Press, 2004, 2009 Journal and conference articles includingIEEE Journal of Solid-StateCircuitsandInternational Solid-State Circuits Conference4 SMEECE 488 Set 1: introduction and BackgroundFun to CheckWilliam F. Brinkman, Douglas E. Haggan, and William W. Troutman, A History of the Invention of the Transistor and Where It Will LeadUs, IEEE Journal of Solid-State Circuits, volume 32, no. 12,December 1997, pp. 1858-1865 Murmann, Digitally Assisted Analog Circuits, IEEEM icro, , no. 2, pp. 38-47, Mar. CAD Tools by Dr. Michael Perrott and his group: 488 Set 1: introduction and BackgroundWhy Analog ? Most of the physical signals are Analog in nature! Although digital is great we need an Analog interface to convertphysical signals from Analog to digital Also, in some application after processing the signals in digital domain,we need to convert them back to Analog .

3 Thus in many applications Analog and mixed-signal circuits are theperformance bottlenecks. Also with constant process improvements the boundary of betweenhigh-speed digital and Analog circuits becomes more and more fuzzy! That is why Analog and mixed-signal designers are still andhopefullywill be in demand for the foreseeable 488 Set 1: introduction and BackgroundTypical Real World System Example:DSPData ConverterAFEF ilterADCDSPGSM47 SMIntel s Tick-Tock ModelEECE 488 Set 1: introduction and BackgroundTick (process technology advancement), Tock (new microarchitecture) 45 nm ProcessEECE 488 Set 1: introduction and 488 Set 1: introduction and BackgroundBackground1. Suggested Reading2. Structure of MOS Transistors3. Threshold Voltage4. Long-Channel Current Equations5. Regions of Operation6. Transconductance7. Second-Order Effects8. Short-Channel Effects9. MOS Layout10. Device Capacitances11. Small-signal Models12.

4 Circuit Impedance13. Equivalent Transconductance10 SMEECE 488 Set 1: introduction and BackgroundSuggested Reading Most of the material in this set are based onChapters 2, 16, and 17 of the Razavi s book: Design of AnalogCMOS Integrated CircuitsMany of the figures in this set are from Design of Analog cmos Integrated Circuits,McGraw-Hill, 2001, unless otherwise 488 Set 1: introduction and BackgroundTransistor Transistor stands for .. Transistor are semiconductor devices that can be classified as Bipolar Junction Transistors (BJTs) Field Effect Transistors (FETs) Depletion-Mode FETs or ( , JFETs) Enhancement-Mode FETs ( , MOSFETs)12 SMEECE 488 Set 1: introduction and BackgroundSimplistic Model MOS transistors have three terminals: Gate, Source, and Drain The voltage of the Gate terminal determines the type of connectionbetween Source and Drain (Short or Open). Thus, MOS devices behave like a switchDevice is OND is shorted to SDevice is OFFD & S are disconnectedVGlowDevice is OFFD & S are disconnectedDevice is OND is shorted to SVGhighPMOSNMOSSM713 SMEECE 488 Set 1: introduction and BackgroundPhysical Structure - 1 Source and Drain terminals are identical except that Source providescharge carriers, and Drain receives them.

5 MOS devices have in fact 4 terminals: Source, Drain, Gate, Substrate (bulk) Microelectronic Circuits, 2004 Oxford University Press14 SMEECE 488 Set 1: introduction and BackgroundPhysical Structure - 2 LD: Due to Side DiffusionPoly-silicon used instead of Metalfor fabrication reasons Actual length of the channel (Leff) is less than the length of gate Charge Carriers are electrons in NMOS devices, and holes inPMOS devices. Electrons have a higher mobility than holes So, NMOS devices are faster than PMOS devices We rather to have a p-type substrate?!SM815 SMEECE 488 Set 1: introduction and BackgroundPhysical Structure - 3 N-wells allow both NMOS and PMOS devices to reside on thesame piece of die. As mentioned, NMOS and PMOS devices have 4 terminals:Source, Drain, Gate, Substrate (bulk) In order to have all PN junctions reverse-biased, substrate ofNMOS is connected to the most negative voltage, and substrateof PMOS is connected to the most positive 488 Set 1: introduction and BackgroundPhysical Structure - 4 MOS transistor Symbols: In NMOS Devices:Current flows from Drain to Source In PMOS Devices:Current flows from Source to Drain Current flow determines which terminal is Source and whichoneis Drain.

6 Equivalently, source and drain can be determined basedon their relative DrainSourcehole SM917 SMEECE 488 Set 1: introduction and BackgroundThreshold Voltage - 1(a) An NMOS driven by a gate voltage, (b) formation of depletionregion, (c) onset of inversion,and (d) channel formation Consider an NMOS: as the gate voltage is increased, the surfaceunder the gate is depleted. If the gate voltage increases more,free electrons appear under the gate and a conductive channel isformed. As mentioned before, in NMOS devices charge carriers in thechannel under the gate are 488 Set 1: introduction and BackgroundThreshold Voltage - 2 Intuitively, the threshold voltage is the gate voltage that forces theinterface (surface under the gate) to be completely depleted of charge (inNMOS the interface is as much n-type as the substrate is p-type) Increasing gate voltage above this threshold (denoted by VTHor Vt)induces an inversion layer (conductive channel) under the gate.

7 Microelectronic Circuits, 2004 Oxford University PressSM1019 SMEECE 488 Set 1: introduction and BackgroundThreshold Voltage - 3 Analytically:oxdepFMSTHCQV+ + =2 Where:substrate silicon the and gate npolysilico the of functions workthe between difference the Potential in-Built = == SilicongateMS == isubFnNqTK lnpotential)atic (electrost Function WorksubFsidepNq Q == 4region depletion the in Charge 20 SMEECE 488 Set 1: introduction and BackgroundThreshold Voltage - 4 In practice, the native threshold value may not be suitedforcircuit Design , , VTHmay be zero and the device may be on forany positive gate voltage. Typically threshold voltage is adjusted by ion implantation into thechannel surface (doping P-type material will increase VTHofNMOS devices). When VDSis zero, there is no horizontal electric field present in thechannel, and therefore no current between the source to the drain. When VDSis more than zero, there is some horizontal electric fieldwhich causes a flow of electrons from source to 488 Set 1: introduction and BackgroundLong Channel Current Equations - 1 The voltage of the surface under the gate, V(x), depends on thevoltages of Source and Drain.

8 If VDSis zero, VD= VS=V(x). The charge density Qd(unit C/m) is uniform.)(THGSoxdVVWCQ =))(()(THGSoxdVxVVWCxQ =()()LVVWLCLVCLQQTHGSoxd = = = If VDSis not zero, the channel is tapered, and V(x) is not density depends on 488 Set 1: introduction and BackgroundLong Channel Current Equations - 3velocityQdtdxdxdQdtdQId = ==dtdVEEvelocity = =, ))((dxxdVvelocity = ))(()(THGSoxdVxVVWCxQ = = ==DSVVTHGSnoxLxDdVVxVVWCdxI00])([ ]21)[(2 DSDSTHGSoxnDVVVVLWCI = Current : Velocity in terms of V(x): Qdin terms of V(x):dxxdVVxVVWCInTHGSoxD)(])([ = Current in terms of V(x): Long-channel current equation: Microelectronic Circuits, 2004 Oxford University PressSM1223 SMEECE 488 Set 1: introduction and BackgroundLong Channel Current Equations - 4() =221 DSDSTHGSoxnDVVVVLWCI Terminology:effTHGSVVVV oltageEffectiveVoltageOverdriveLWRatioAs pect= === Current in Triode Region: If VDS VGS-VTH we say the device is operating in triode (or linear) 488 Set 1.

9 introduction and BackgroundLong Channel Current Equations - 5()()()THGSoxnDDSONDSTHGSoxnDTHGSDSVVLWC IVRVVVLWCIVVVIf == = << 1:2 For very small VDS(deep Triode Region):IDcan be approximated to be a linear function of device resistance will be independent of VDSand willonly depend on device will behave like a variable resistorSM1325 SMEECE 488 Set 1: introduction and BackgroundLong Channel Current Equations - 6 Increasing VDScauses the channel to acquire a tapered shape. Eventually,as VDSreaches VGS VTHthe channel is pinched off at the drain. IncreasingVDSabove VGS VTHhas little effect (ideally, no effect) on the channel sshape. Microelectronic Circuits, 2004 Oxford University Press When VDSis more than VGS VTHthe channel is pinched off, and thehorizontal electric field produces a 488 Set 1: introduction and BackgroundLong Channel Current Equations - 7 If VDS> VGS VTH, the transistor is in saturation (active) region,and the channel is pinched off.

10 = ==THGSVVVTHGSnoxLxDdVVxVVWCdxI0'0])([ 2)('21 THGSoxnDVVLWCI = Let s, for now, assume that L =L. The fact thatL is not equal to L is a second-order effectknown as channel-length modulation. Since IDonly depends on VGS, MOS transistors in saturation can beused as current 488 Set 1: introduction and BackgroundLong Channel Current Equations - 8 Current Equation for NMOS:()()[] >> <> <<> <==)(,;)(21)(,;21)()(2,;)(;022 SaturationVVVVVifVVLWCT riodeVVVVVifVVVVLWCT riodeDeepVVVVVifVVVLWCoffCutVVifIITHGSDSTHGSTHGSoxnTHGSDSTHGSDSDSTHGSoxnTHGSDSTHGSDSTHGSoxnTHGSDSD 28 SMEECE 488 Set 1: introduction and BackgroundLong Channel Current Equations - 9 Current Equation for PMOS:()()[] >> <> <<> <==)(,;)(21)(,;21)()(2,;)(;022 SaturationVVVVVifVVLWCT riodeVVVVVifVVVVLWCT riodeDeepVVVVVifVVVLWCoffCutVVifIITHSGSD THSGTHSGoxpTHSGSDTHSGSDSDTHSGoxpTHSGSDTH SGSDTHSGoxpTHSGSDD SM1529 SMEECE 488 Set 1: introduction and BackgroundRegions of Operation - 1 Regions of Operation:Cut-off, triode (linear), and saturation (active or pinch-off) Microelectronic Circuits, 2004 Oxford University Press Once the channel is pinched off, the current through the channel isalmost constant.