Eng. Note Ferrite Beads - Vishay Intertechnology

1 Engineering Note Vishay Dale ILB, ILBB Ferrite Beads Electro-Magnetic Interference and Electro-Magnetic Compatibility (EMI/EMC). David B. Fancher Inductive Products Division Vishay Dale INTRODUCTION Figure 2. Manufacturers of electrical and electronic equipment regularly submit their products for EMI/EMC testing to ensure regulations on electromagnetic compatibility are met. Inevitably, some equipment will fail, as the interference transmitted on cables connected to the equipment exceeds . regulated limits, resulting in radiated emissions failure. Avoid Track Stubs Additional problems can occur when connected equipment causes interference problems with the equipment under test On sensitive components and terminations, use resulting in component malfunction.

2 Surrounding guard ring and ground fill where possible. There are many ways to reduce the level of conducted and A guard ring around trace layers reduces emission out of radiated interference, especially during the initial design of the the board; also,connect to ground only at a single point and circuit board. make no other use of the guard ring. (Figure 3). These techniques include proper routing of tracks, proper use Figure 3. of ground planes, power supply impedance matching, and reducing logic frequency to a minimum. Ground Fill Guard Guard Ring on Trace Ring on Trace Even with the most diligent employment of good EMI/EMC Side Side circuit design practices, not all interference or compatibility issues can be eliminated.

3 At this point, additional components can be added, allowing the circuit to comply with design and regulation limits for EMI/EMC. Use Guard Ring and Ground Fill This engineering note will review both initial circuit board design on Terminations and Sensitive Components practices and identify some after design components that can be used to solve EMI/EMC problems. When you have separate power planes, keep them over a CIRCUIT DESIGN TIPS TO REDUCE EMI/EMC common ground to reduce system noise and power coupling. PROBLEMS (Figure 4). There are several areas where good circuit design practices are critical to the reduction or elimination of EMI/EMC problems.

4 Figure 4. How the PCB layout is approached - not simply in the design but also the choice of components - directly affects the degree of EMI/EMC interference. Another area of concern is the circuit Vcc Vdd Vcc Vdd design of the power supply. PCB Design Tips Avoid slit apertures in PCB layout, particularly in ground . planes or near current paths. Avoid Overlapping Power Planes Areas of high impedance give rise to high EMI, so use wide tracks for power lines on the trace sides. The power plane conductivity should be high, so avoid localized concentrations of via and through hole pads Make signal tracks stripline and include ground plane and (surface mount is preferred mounting method).

5 Power plane whenever possible. Keep HF and RF tracks as short as possible, and lay out the Track mitering (beveling of edges and corners) reduces HF tracks first. (Figure 1) field concentration. If possible, make tracks run orthogonally between adjacent Figure 1 layers. (Figure 5). Figure 5.. Keep HF Tracks Short Avoid track stubs, as they cause reflections and harmonics. Make Tracking Run Orthogonally Between Layers (Figure 2). Document Number 34091. 184 Revision 07-May-99. Engineering Note Vishay Dale Do not loop tracks, even between layers, as this forms a Figure 10.

6 Receiving or radiating antenna. Vcc Do not leave floating conductor areas, as they act as EMI. radiators; if possible connect to ground plane (often, these DC DC. sections are placed for thermal dissipation, so polarity should DC. CCT1. DC. CCT2. not be a consideration, but verify with component data sheet). (Figure 6). GND. Figure 6 Isolated Individual Systems Component Considerations Locate biasing and pull up/down components close to driver/. bias points. Minimize output drive from clock circuits. Do Not Leave Floating Conducting Areas Use common mode chokes ( Vishay Dale series LPT4545 or LPT3535 or the LPE series of surface mount transformers).

7 Power Supply Considerations between current carrying and signal lines to increase Eliminate loops in the supply lines. (Figure 7) coupling and cancel stray fields. (Figure 11). Figure 7 Figure 11. PSU CCT1 CCT2 Vcc GND Signal Receiving Input Circuit PSU CCT1 CCT2. Vcc GND . Use Common Mode Choke Between Signal Lines Eliminate Loops in Supply Lines Decouple close to chip supply lines, to reduce component Decouple supply lines at local boundaries. (Figure 8) noise and power line transients. (Figure 12). Figure 8 Figure 12. Vcc GND. Vcc CCT1 CCT1. Decouple Close to IC Supply Lines GND.

8 Decouple Supply Lines at Local Boundaries Use low impedance capacitors for de-coupling and bypassing (ceramic multilayer capacitors, like those offered by Vishay Place high speed circuits close to Power Supply Unit (PSU) Vitramon are preferred, offering high resonant frequencies and slowest sections furthest away to reduce power plane and stability). transients. (Figure 9). Use discrete components for filters where possible (surface Figure 9 mount is preferable due to lower parasitic and aerial effects of termination's compared to through hole components). Low Ensure filtering of cables and overvoltage protection at the High Medium Speed terminations (this is especially true of cabling that is external (Interface).)

9 PSU. Speed Circuit Speed to the system, if possible all external cabling should be Circuit DC. (Micro) (Display) Circuit isolated at the equipment boundary). (Analog). Minimize capacitive loading on digital output by minimizing fanout, especially on CMOS ICs (this reduces current loading Place High Speed Circuits Close to PSU and surge per IC). Isolate individual systems where possible (especially analog If available, use shielding on fast switching circuits, main power and digital systems) on both power supply and signal lines. supply components and low power circuitry (shielding is (Figure 10) expensive and should be considered a last resort option).

10 Document Number 34091 Revision 07-May-99 185. Engineering Note Vishay Dale MAGNETIC COMPONENTS FOR ELECTRO MAGNETIC One particular area where high noise immunity is essential is in INTERFERENCE REDUCTION AND ELECTRO thyristor/triac driving circuits. Here the transformer provides an MAGNETIC COMPATIBILITY isolation between the driven load and a logic based controller. Products that use magnetics to reduce electro-magnetic The isolating pulse transistor provides much better noise interference and improve electro magnetic compatibility within immunity than an insulated gate bipolar transistor (IGBT) due to the circuit can be classified into several categories: inductors, inherently lower coupling capacitance (typically 10's of pF for a chokes, transformers, Ferrite Beads , capacitors, and integrated pulse transformer compared to nF for a power IGBT device).