ENGN 2211 Electronic Circuits and Devices Problem Set #8 ...

1 ANU ENGN 2211. AUSTRALIAN NATIONAL UNIVERSITY. Department of Engineering ENGN 2211 Electronic Circuits and Devices Problem Set #8 BJT CE Amplifier Circuits Q1. Consider the common-emitter BJT amplifier circuit shown in Figure 1. Assume VCC = 15 V, = 150, VBE = V, RE = 1 k , RC = k , R1 = 47 k , R2 = 10 k , RL = 47 k , Rs = 100 . +VCC. R1 RC. C2. Rs C1. vo RL. vs vin R2 RE. CE. Figure 1: The circuit for Question 1. (a) Determine the Q-point. (b) Sketch the DC load-line. What is the maximum (peak to peak) output voltage swing available in this amplifier. (c) Draw the AC equivalent circuit and determine the AC model parameters.

2 (d) Derive expressions for Rin , Rout , Avoc , Av , Ai , G. (e) Find Rin , Rout , Avoc , Av , Ai , G. (f) Find the output voltage waveform if vs = 10 10 3 sin(2 5000t). Sketch the source and output voltage waveforms. (g) Determine whether clipping will take place if vs = 25 10 3 sin(2 5000t). Problem Set #8 page 1. ANU ENGN 2211. Q2. Consider the common-emitter BJT amplifier circuit shown in Figure 2. Assume VCC = 15 V, = 150, VBE = V, RE = k , RC = k , R1 = 47 k , R2 = 10 k , RL = 47 k , Rs = 100 . +VCC. R1 RC. C2. Rs C1. vo RL. vs vin R2 RE. CE. Figure 2: The circuit for Question 2.

3 (a) Determine the Q-point. (b) Sketch the DC load-line. What is the maximum (peak to peak) output voltage swing available in this amplifier. (c) Draw the AC equivalent circuit and determine the AC model parameters. (d) Derive expressions for Rin , Rout , Avoc , Av , Ai , G. (e) Find Rin , Rout , Avoc , Av , Ai , G. (f) Find the output voltage waveform if vs = 10 10 3 sin(2 5000t). Sketch the source and output voltage waveforms. Problem Set #8 page 2. ANU ENGN 2211. AUSTRALIAN NATIONAL UNIVERSITY. Department of Engineering ENGN 2211 Electronic Circuits and Devices Problem Set #8 Solution Q1.

4 Complete Solution Given that VCC = 15 V, = 150, VBE = V, RE = 1 k , RC = k , R1 = 47 k , R2 = 10 k , RL = 47 k , Rs = 100 . +VCC. R1 RC. C2. Rs C1. vo RL. vs vin R2 RE. CE. (a). Analyzing the DC Voltage-divider bias circuit , we have R2. VT H = VCC. R1 + R2. 10k = (15) = V. 10k + 47k R2 R1. RT H =. R1 + R2. (10k)(47k). = = k . 10k + 47k VT H VBE. IB =. RT H + ( + 1)RE. = = A. + (151)(1k). IC = IB. = (150)( ) = mA. IE = ( + 1)IB. = (151)( ) = mA. VE = IE RE. = ( )(1k) = V. VC = VCC IC RC. = 15 ( )( ) = V. VCE = VCC IC RC IE RE. = 15 ( )( ) ( )(1k) = V. Problem Set #8 page 3.

5 ANU ENGN 2211. As IB > 0 and VCE > V, the transistor is in active region of operation. The Q-point lies at ICQ = mA. VCEQ = V. (b). For ideal cut-off VCE(o f f ) = VCC = 15 V. For ideal saturation VCC 15. IC(sat) = = = mA. RC + RE The plot of DC load line is shown in figure below 3. Ideal Saturation 2. Current IC (mA). Q point 1. Ideal Cut off 0. 0 5 10 15. Voltage VCE (V). We see that the Q-point lies closer to saturation (VCE = V) than cut-off (VCE = 15 V). Hence the maximum available peak to peak output voltage swing = 2(VCEQ ) = V. (c). Replacing the capacitors by short Circuits and VCC by virtual AC ground, the AC equivalent circuit is Rs vo RC RL.

6 Vs vin R1 R2. Problem Set #8 page 4. ANU ENGN 2211. Replacing the transistor by the small-signal AC equivalent circuit , we have iin ib ic Rs io B C. vs vin RB vbe r i b RC vo RL. E E. The AC Model parameters are 26 mV. re =. IEQ. 26. = = . r = ( + 1)re = (151)( ) = k . RB = R1 ||R2. = k . 0. RL = RL ||RC. = (47 k)||( k) = k . (d). For derivations, please see Lecture 13. (e). The BJT CE amplifier parameters are Rin = RB ||r . = ( k)||( k) = k . Ro = RC. = k . RC . Avoc = . r . ( k)(150). = = k 0. R . Av = L. r . ( k)(150). = = k Rin Ai = Av RL. k = ( ) = 47 k G = Ai Av = ( )( ) = Problem Set #8 page 5.

7 ANU ENGN 2211. (f). Finding the equation for output voltage with load, we have vs = 10 10 3 sin(2 5000t). Rin vin = vs Rs + Rin k = vs 100 + k = vo = Av vin = ( )( vs ). = ( )( )(10 10 3 sin(2 5000t)). = sin(2 5000t). The required peak to peak output voltage swing = 2( )= V. The maximum available peak to peak output voltage swing = V > V. Hence no clipping will take place. The -ve sign indicates that output voltage is 180 out of phase with input voltage (inverting amplifier). 1. The time period is T = 5000 = ms. The sketch of input and output voltages is shown in figures below:- (Note y-axis has different units in the two figures).

8 10 3. X: Y: 2. 5. 1. Voltage vs (mV). Voltage vo (V). 0 0. 1. 5. 2. 10 3. 0 0 Time t (ms) Time t (ms). Figure 3: Source voltage vs (t). Figure 4: Output voltage vo (t). (g). For vs = 25 10 3 sin(2 5000t), we have vo = Av vin = ( )( vs ). = ( )( )(25 10 3 sin(2 5000t)). = sin(2 5000t). The required peak to peak output voltage swing = 2( )= V. However the maximum available peak to peak output voltage swing = V < V. Hence clipping will take place. See Problem Set #8 page 6. ANU ENGN 2211. Q2. Solution Given that VCC = 15 V, = 150, VBE = V, RE = k , RC = k , R1 = 47 k , R2 = 10 k , RL = 47 k , Rs = 100.

9 +VCC. R1 RC. C2. Rs C1. vo RL. vs vin R2 RE. CE. (a). Analyzing the DC Voltage-divider bias circuit , we have VT H = V. RT H = k . IB = A. IC = mA. IE = mA. VC = V. VE = V. VCE = V. As IB > 0 and VCE > V, the transistor is in active region of operation. The Q-point lies at ICQ = mA. VCEQ = V. Problem Set #8 page 7. ANU ENGN 2211. (b). For ideal saturation and cut-off VCE(o f f ) = 15 V. IC(sat) = mA. The plot of DC load line is shown in figure below 3. 2 Ideal Saturation Current IC (mA). 1. Q point Ideal Cut off 0. 0 5 10 15. Voltage VCE (V). We see that the Q-point lies closer to cut-off (VCE = 15 V) than saturation (VCE = V).

10 Hence the maximum available peak to peak output voltage swing = 2(VCC VCEQ ) = V. (c). The AC Model parameters are re = . r = k . RB = k . 0. RL = k . (d). For derivations, please see Lecture 13. (e). The BJT CE amplifier parameters are Rin = k . Ro = k . Avoc = Av = Ai = G = Problem Set #8 page 8. ANU ENGN 2211. (f). vs = 10 10 3 sin(2 5000t). vin = vo = sin(2 5000t). The required peak to peak output voltage swing = 2( )= V. The maximum available peak to peak output voltage swing = V > V. Hence no clipping will take place. The sketch of input and output voltages is shown in figures below:- (Note y-axis has different units in the two figures).