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1 Contents of MSP430FG43x Code Examples ( ) - asm (CCS), .s43 (IAR), and .c (CCS & IAR). Link to zip file: Applicable Devices: MSP430FG437, MSP430FG438, MSP430FG439. Consult included in the zip file for disclaimer and coding style guidelines Contents: Assembly Code Examples (.asm, CCS compatible). Assembly Code Examples (.s43. IAR compatible). C Code Examples (.c, IAR & CCS compatible)..asm code examples CCS. File name Description Software Toggle ADC12, Sample A0, Set if A0 > *AVcc ADC12, Using the Internal Reference ADC12, Sample A10 Temp, Set if temp ++ ~2c ADC12, Extend Sampling Period With SHT Bits ADC12, Using an External Reference ADC12, Repeated Sequence of Conversions ADC12, Repeated Single Channel Conversions ADC12, Using 10 External Channels of Conversion ADC12, Sequence of Conversions (non-repeated).

2 ADC12, Sample A10 Temp and Convert to oC and oF. ADC12, Using the Internal Reference, Channel A12. ADC12, Using the Internal Reference, Channel A13. ADC12, Using the Internal Reference, Channel A14. ADC12, Using the Internal Reference, Channel A15. Basic Timer, Toggle Inside ISR, DCO SMCLK. Basic Timer, Toggle Inside ISR, 32kHz ACLK. FLL+, Output MCLK, SMCLK, ACLK Using 32kHz XTAL. FLL+, Output 32kHz Xtal + HF Xtal + Internal DCO. DAC12_0, Output on DAC0. DAC12_1, Output on DAC1. DAC12_0, Output Voltage Ramp on DAC0. DAC12_0, Output Voltage Ramp on VeREF+. DMA0, Repeated Burst to-from RAM, Software Trigger DMA0, Repeated Block To P5 OUT, CCR2 IFG Trigger DMA0, Repeated Block UART0 9600, CCR2 IFG, ACLK.

3 DMA0, Block Mode UART1 9600, ACLK. DMA0, Repeated Block to DAC0 Sine Output, CCR2, DCO. DMA0, ADC12 A10 Block Xfer to RAM, Timer_B, SMCLK. DMA0, ADC12 A10 Block Xfer to Flash, Timer_B, SMCLK. FLL+, Runs Internal DCO at FLL+, Runs Internal DCO at 8 MHz FLL+, MCLK Configured to Operate from XT2 HF XTAL. Flash In-System Program Memory LCD, Display "0123456" on SBLCDA4 LCD. LCD, Display "430" on Varitronix VI-322 LCD. FLL+, LPM3 Using Basic Timer ISR, 32kHz ACLK. OA0, Comparator Mode OA0, Comparator in General-Purpose Mode OA0, General-Purpose Mode OA0, Inverting PGA Mode OA0, Non-Inverting PGA Mode OA0, Unity-Gain Buffer Mode OA1, Comparator Mode OA1, Comparator in General-Purpose Mode OA1, Inverting PGA Mode OA1, Non-Inverting PGA Mode OA1, Unity-Gain Buffer Mode 3-Amp Differential Amplifier with OA0, OA1, and OA2.

4 3-Amp Differential Amplifier with OA1, OA2, and OA0. 3-Amp Differential Amplifier with OA2, OA0, and OA1. USART0, SPI Interface to HC165/164 Shift Registers SVS, POR @ Vcc Timer_A, Toggle , CCR0 Cont. Mode ISR, DCO SMCLK. Timer_A, Toggle , CCR0 Up Mode ISR, DCO SMCLK. Timer_A, Toggle , Overflow ISR, DCO SMCLK. Timer_A, Toggle , Overflow ISR, 32kHz ACLK. Timer_A, Toggle , CCR0 Up Mode ISR, 32kHz ACLK. Timer_A, PWM TA1-2 Up Mode, DCO SMCLK. Timer_A, PWM TA1-2 Up Mode, 32kHz ACLK. Timer_B, Toggle , CCR0 Cont. Mode ISR, DCO SMCLK. Timer_B, Toggle , CCR0 Up Mode ISR, DCO SMCLK. Timer_B, Toggle , Overflow ISR, DCO SMCLK.

5 Timer_B, Toggle , Overflow ISR, 32kHz ACLK. Timer_B, Toggle , CCR0 Up Mode ISR, 32kHz ACLK. Timer_B, PWM TB1-2 Up Mode, DCO SMCLK. Timer_B, PWM TB1-2 Up Mode, 32kHz ACLK. USART0, 115200 UART Echo ISR, DCO SMCLK. USART0, 2400 UART Ultra-low Pwr Echo ISR, 32kHz ACLK. USART0, 9600 UART Echo ISR, DCO SMCLK. USART0, 19200 UART Echo ISR, DCO SMCLK. USART0, 19200 UART Ultra-low Pwr Echo ISR, DCO SMCLK. WDT, Toggle , Interval Overflow ISR, DCO SMCLK. WDT, Toggle , Interval Overflow ISR, 32kHz ACLK..s43 code examples IAR. File name Description Software Toggle ADC12, Sample A0, Set if A0 > *AVcc ADC12, Using the Internal Reference ADC12, Sample A10 Temp, Set if temp ++ ~2c ADC12, Extend Sampling Period With SHT Bits ADC12, Using an External Reference ADC12, Repeated Sequence of Conversions ADC12, Repeated Single Channel Conversions ADC12, Using 10 External Channels of Conversion ADC12, Sequence of Conversions (non-repeated).

6 ADC12, Sample A10 Temp and Convert to oC and oF. ADC12, Using the Internal Reference, Channel A12. ADC12, Using the Internal Reference, Channel A13. ADC12, Using the Internal Reference, Channel A14. ADC12, Using the Internal Reference, Channel A15. Basic Timer, Toggle Inside ISR, DCO SMCLK. Basic Timer, Toggle Inside ISR, 32kHz ACLK. FLL+, Output MCLK, SMCLK, ACLK Using 32kHz XTAL. FLL+, Output 32kHz Xtal + HF Xtal + Internal DCO. DAC12_0, Output on DAC0. DAC12_1, Output on DAC1. DAC12_0, Output Voltage Ramp on DAC0. DAC12_0, Output Voltage Ramp on VeREF+. DMA0, Repeated Burst to-from RAM, Software Trigger DMA0, Repeated Block To P5 OUT, CCR2 IFG Trigger DMA0, Repeated Block UART0 9600, CCR2 IFG, ACLK.

7 DMA0, Block Mode UART1 9600, ACLK. DMA0, Repeated Block to DAC0 Sine Output, CCR2, DCO. DMA0, ADC12 A10 Block Xfer to RAM, Timer_B, SMCLK. DMA0, ADC12 A10 Block Xfer to Flash, Timer_B, SMCLK. FLL+, Runs Internal DCO at FLL+, Runs Internal DCO at 8 MHz FLL+, MCLK Configured to Operate from XT2 HF XTAL. Flash In-System Program Memory LCD, Display "0123456" on SBLCDA4 LCD. LCD, Display "430" on Varitronix VI-322 LCD. FLL+, LPM3 Using Basic Timer ISR, 32kHz ACLK. OA0, Comparator Mode OA0, Comparator in General-Purpose Mode OA0, General-Purpose Mode OA0, Inverting PGA Mode OA0, Non-Inverting PGA Mode OA0, Unity-Gain Buffer Mode OA1, Comparator Mode OA1, Comparator in General-Purpose Mode OA1, Inverting PGA Mode OA1, Non-Inverting PGA Mode OA1, Unity-Gain Buffer Mode 3-Amp Differential Amplifier with OA0, OA1, and OA2.

8 3-Amp Differential Amplifier with OA1, OA2, and OA0. 3-Amp Differential Amplifier with OA2, OA0, and OA1. USART0, SPI Interface to HC165/164 Shift Registers SVS, POR @ Vcc Timer_A, Toggle , CCR0 Cont. Mode ISR, DCO SMCLK. Timer_A, Toggle , CCR0 Up Mode ISR, DCO SMCLK. Timer_A, Toggle , Overflow ISR, DCO SMCLK. Timer_A, Toggle , Overflow ISR, 32kHz ACLK. Timer_A, Toggle , CCR0 Up Mode ISR, 32kHz ACLK. Timer_A, PWM TA1-2 Up Mode, DCO SMCLK. Timer_A, PWM TA1-2 Up Mode, 32kHz ACLK. Timer_B, Toggle , CCR0 Cont. Mode ISR, DCO SMCLK. Timer_B, Toggle , CCR0 Up Mode ISR, DCO SMCLK. Timer_B, Toggle , Overflow ISR, DCO SMCLK.

9 Timer_B, Toggle , Overflow ISR, 32kHz ACLK. Timer_B, Toggle , CCR0 Up Mode ISR, 32kHz ACLK. Timer_B, PWM TB1-2 Up Mode, DCO SMCLK. Timer_B, PWM TB1-2 Up Mode, 32kHz ACLK. USART0, 115200 UART Echo ISR, DCO SMCLK. USART0, 2400 UART Ultra-low Pwr Echo ISR, 32kHz ACLK. USART0, 9600 UART Echo ISR, DCO SMCLK. USART0, 19200 UART Echo ISR, DCO SMCLK. USART0, 19200 UART Ultra-low Pwr Echo ISR, DCO SMCLK. WDT, Toggle , Interval Overflow ISR, DCO SMCLK. WDT, Toggle , Interval Overflow ISR, 32kHz ACLK. C code examples IAR & CCS. File name Description Software Toggle ADC12, Sample A0, Set if A0 > *AVcc ADC12, Single Conversion on Single Channel ADC12, Using an External Reference ADC12, Extend Sampling period with SHT Bits ADC12, Using the Internal Reference ADC12, Repeated Sequence of Conversions ADC12, Repeated Single Channel Conversions ADC12, Using 10 External Channels for Conversion ADC12, Sequence of Conversions (non-repeated).

10 ADC12, Using the Temperature Sensor ADC12, Single Conversion on Channel A12. ADC12, Single Conversion on Channel A13. ADC12, Single Conversion on Channel A14. ADC12, Single Conversion on Channel A15. Basic Timer, Toggle Inside ISR, DCO SMCLK. Basic Timer, Toggle Inside ISR, 32kHz ACLK. FLL+, Output 32kHz XTAL + HF XTAL + Internal DCO. DAC12_0, Output 1V on DAC0. DAC12_1, Output 2V on DAC1. DAC12_0, Output Voltage Ramp on DAC0. DAC12_0, Output Voltage Ramp on VeREF+. DMA0, Repeated Burst to-from RAM, Software Trigger DMA0, Repeated Block To P5 OUT, TACCR2, DCO. DMA0, Repeat Single to UART 19200, TACCR2, DCO.