Transcription of Intrinsic Silicon Properties
1 ECE 410, Prof. A. MasonLecture Notes Silicon Properties Read textbook, section , , Intrinsic semiconductors undoped ( , not n+ or p+) Silicon has intrinsiccharge carriers electron - hole pairs are created by thermal energy Intrinsic carrier concentration ni= , at room temp. function of temperature: increase or decrease with temp? n = p = ni, in Intrinsic (undoped) material n number of electrons, p number of holes mass-action law, np = ni2 applies to undoped and doped materialECE 410, Prof. A. MasonLecture Notes Silicon Properties doping, adding dopantsto modify material Properties n-type = n+, add elements with extra an electron (arsenic, As, or phosphorus, P), Group V elements nn concentration of electrons in n-type material nn= Ndcm-3, Nd concentration of donoratoms pn concentration of holes in n-type material Ndpn= ni2, using mass-action law always a lot more n than p in n-type material p-type = p+, add elements with an extra hole (boron, B)
2 Pp concentration of holes in p-type material pp= Nacm-3, Na concentration of acceptoratoms np concentration of electrons in p-type material Nanp= ni2, using mass-action law always a lot more p than n in p-type material if both Ndand Napresent, nn= Nd-Na, pp=Na-Nddo example on boardni2= +/p+ defines regionas heavily doped, typically 1016-1018cm-3less highly doped regions generally labeled n/p (without the +)PP++-group Velementionelectronn-type DonorfreecarrierBB++-group IIIelementholep-type AcceptorionfreecarrierECE 410, Prof. A. MasonLecture Notes in semiconductors doping provides free charge carriers, alters conductivity conductivity, , in semic. w/ carrier densities nand p = q( nn+ pp), q electron charge, q= [Coulombs] mobility[cm2/V-sec], n 1360, p 480 (typical values) in n-type region, nn>> pn q nnn in p-type region, pp>> np q pnp resistivity, = 1/ resistance of an n+ or p+ region R = l , A = wt drift current(flow of charge carriers in presence of an electric field, Ex) n/p drift current density: Jxn = nEx= q nnnEx, Jxp = pEx= q pppEx total drift current densityin x direction Jx = q( nn+ pp) Ex= Exmobility = average velocity per unit electric field n> pelectrons more mobile than holes conductivity of n+ > p+ltwAMobility often assumed constantbut is a function of Temperature and Doping ConcentrationECE 410, Prof.
3 A. MasonLecture Notes Junctions: Intro What is a pn Junction? interface of p-type andn-type semiconductor junction of two materials forms a diode In the ionization of dopantsat material interface Diffusion -movement of charge to regions of lower concentration free carries diffuse out leave behind immobile ions region become depleted offree carriers ions establish an electric field acts against diffusiondonor ion and electron free carrieracceptor ion and hole free carrierp-typehole diffusionhole currentelectron diffusionelectron currentN acceptors/cmA3N donors/cmD3n-type-+-+-+-+-+-+-+-++-+-+-+ -+-+-+-+-+-+-+-Edepletion regionimmobile acceptor ions(negative-charge)immobile donor ions(positive-charge)electric fieldxpWxn--------++++++++p-typeN acceptors/cmA3N donors/cmD3n-typep-type Si waferpn diodejunctiondepletion regionboundariesdielectricinsulato(oxide )contactto p-sidecontactto n-sidep+n+n well rp-typen-typeECE 410, Prof.
4 A. MasonLecture Notes Junctions: Equilibrium Conditions Depletion Region area at pn interface void of free charges charge neutrality must have equal charge on both sides q A xpNA= q A xnND, A=junction area; xp, xndepth into p/n side xpNA= xnND depletion region will extend further into the more lightly doped side of the junction Built-in Potential diffusion of carriers leaves behind immobile charged ions ions create an electric field which generates a built-in potential where VT= kT/q = 26mV at room temperatureEdepletion regionimmobile acceptor ions(negative-charge)immobile donor ions(positive-charge)electric fieldxpWxn--------++++++++p-typeN acceptors/cmA3N donors/cmD3n-typeNAND = 20lniDATnNNVECE 410, Prof. A.
5 MasonLecture Notes Junctions: Depletion Width Depletion Widthuse Poisson s equation & charge neutrality W = xp+ xn where VRis applied reverse bias One-sided Step Junction if NA>>ND(p+n diode) most of junction on n-side if ND>>NA (n+p diode) most of junction on p-sideEdepletion regionimmobile acceptor ions(negative-charge)immobile donor ions(positive-charge)electric fieldxpWxn--------++++++++p-typeN acceptors/cmA3N donors/cmD3n-typeNAND = 20lniDATnNNV()()2102 ++ =ADADRpNNqNNVx ()()2102 ++ =ADDARnNNqNNVx ()2102 ++ =ADADRNNNNqVW ()2102 + = ARpqNVxW ()2102 + = DRnqNVxW is the permittivity of Si = = KS 0, where 0 = KS= the relative permittivity of siliconECE 410, Prof. A. MasonLecture Notes Junctions - Depletion Capacitance Free carriers are separated by the depletion layer Separation of charge creates junction capacitance Cj= A/d (d = depletion width, W) A is complex to calculate in semiconductor diodes consists of both bottomof the well and side-wallareas Cj is a strong function of biasing must be re-calculated ifbias conditions change CMOS doping is not linear/constant graded junctionapproximation Junction Breakdown if reverse bias is too high (typically > 30V) can get strong reverse current flow() + +=RDADAjVNNNNqAC02112 is the permittivity of Si = 0= applied reverse bias +=01 RjojVCC()
6 2102 + =DADAjoNNNNqAC +=301 RjojVCCECE 410, Prof. A. MasonLecture Notes Forward Bias; VD> 0 acts against built-in potential depletion width reduced diffusion currentsincrease with VD minority carrierdiffusion Reverse Bias; VR= -VD> 0 acts to support built-in potential depletion width increased electric field increased small drift currentflows considered leakage small until VRis too high and breakdown occursDiode Biasing and Current Flow+ V -DVDVf+ V -DIDIDIDpn()1 =TDVVSDeII + ADSNNAI11 ECE 410, Prof. A. MasonLecture Notes Capacitor MOSFETs move charge from drain to source underneath the gate, ifa conductive channel exists under the gate Understanding how and why the conductive channel is produced is important MOSFET capacitormodels the gate/oxide/substrate region source and drain are ignored substrate changes with applied gate voltage Consider an nMOS device Accumulation, VG< 0, (-)ve charge on gate induces (+)ve charge in substrate (+)ve charge accumulate from substrate holes (h+) Depletion, VG> 0 but small creates depletion region in substrate (-)ve charge but no free carriers Inversion, VG> 0 but larger further depletion requires high energy (-)ve charge pulled from Ground electron (e-)
7 Free carriers in channelSi substrate = bulkgate oxideGGSDBB gatechannel=p-type Si substratedepletion layerdepletion layerAccumulationDepletionInversionp-typ e Si substratep-type Si substrateV < 0GV > 0GV >> 0 GBBB+ + + + + + ++ + + + + + ++ + + + + + + + + + + + + + + + + + + + +- - - - - - -- - - - - - -- - - - - - -- - - - - - - - - -ECE 410, Prof. A. MasonLecture Notes in MOSFET Capacitor In Accumulation Gate capacitance = Oxide capacitance Cox = ox/tox[F/cm2] In Depletion Gate capacitance has 2 components 1) oxide capacitance 2) depletion capacitance of the substrate depletion region Cdep= si/xd, xd= depth of depletion region into substrate Cgate = Cox (in series with) Cdep = Cox Cdep / (Cox+Cdep) < Cox C s in series add like R s in parallel In Inversion free carries at the surface Cgate = CoxCgateVGCoxinversiondepletionaccumulat ionCoxCdepECE 410, Prof.
8 A. MasonLecture Notes Operation MOSFET off unless in inversion look more deeply at inversion operation Define some stuff Qs = total charge in substrate VG= applied gate voltage Vox = voltage drop across oxide s= potential at Silicon /oxide interface (relative to substrate-ground) Qs = -Cox VG VG= Vox + s During Inversion (for nMOS) VG> 0 applied to gate Vox drops across oxide (assume linear) sdrops across the Silicon substrate, most near the surfaceECE 410, Prof. A. MasonLecture Notes Charge QB= bulk charge, ion charge in depletion region under the gate QB= - q NAxd, xd= depletion depth QB= - (2q Si NA s)1/2= f(VG) charge per unit area Qe = charge due to free electrons at substrate surface Qs = QB+ Qe < 0 (negative charge for nMOS)212 =AsdqNx depletionregionQB, bulkchargeelectronlayer, QeECE 410, Prof.
9 A. MasonLecture Notes Charge vs. Gate Voltage Surface Charge vs. Gate Voltage VG< Vtn, substrate charge is all bulk charge, Qs = QB VG= Vtn, depletion region stops growing xdat max., further increase of VGwill NOT increase xd QBat max. VG> Vtn, substrate charge has both components, Qs = QB+ Qe since QBis maxed, further increases in VGmust increase Qe increasing Qe give more free carriers thus less resistance Threshold Voltage Vtn defined as gate voltage where Qe starts to form Qe= -Cox (VG-Vtn) Vtn is gate voltage required to overcome material difference between Silicon and oxide establish depletion region in channel to max value/sizeECE 410, Prof. A. MasonLecture Notes of MOSFET Current Gate current gate is essentially a capacitor no current through gate gate is a control node VG< Vtn, device is off VG> Vtn, device is on and performance is a function of VGSand VDS Drain Current (current from drain to source), ID Source = source/supply of electrons (nMOS) or holes (pMOS) Drain = drain/sink of electrons (nMOS) or holes (pMOS) VDSestablishes an E-field across (horizontally) the channel free charge in an E-field will create a drain-source current is IDdrift or diffusion current?
10 MOSFET I-V CharacteristicsnMOSdrain@ (+)ve potentialElectron FlowCurrent Flowsource@ groundCharge FlowCurrent Flow VGSVDS = VGS-VtnECE 410, Prof. A. MasonLecture Notes Charge and Current Threshold Voltage = Vtn, Vtp amount of voltage required on the gate to turn tx on gate voltage > Vtn/p will induce charge in the channel nMOS Channel Charge Qc = -CG(VG-Vtn), from Q=CV, (-) because channel holds electrons nMOS Channel Current(linear model:) I = |Qc| / tt, where tt= transit time, average time to cross channel tt= channel length / (average velocity) = L / v average drift velocity in channel due to electric field E v= nE assuming constant field in channel due to VDS E= VDS/ L I = nCox (W/L) (VG-Vtn) VDS : linear model, assumes constant charge in channelsimilar analysis applies for pMOS, see textbookLLVQcIDSn =)(||VtnVCoxWLQcCoxWLCGG = =assumes channel charge isconstant from source to drainECE 410, Prof.