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IPFA 2018 TECHNICAL PROGRAM 16 - 19 July

IPFA 2018 TECHNICAL PROGRAM 16 - 19 July Time 16 July (Day 0) - Tutorials and Workshops Session TUT A: Tutorials Session TUT B: Tutorials 08:30 hrs Tutorial Session Chair: Alfred Quah, GLOBALFOUNDRIES Singapore Tutorial Session Chair: Venkat Krishnan Ravikumar, AMD Singapore BEOL Reliability - From FinFETs to More-than-Moore Internet of Things and Low Power Technology Devices Concepts and Fault Isolation on Chip and System Level 08:30 - 10:30 hrs TUT A1 TUT B1. (Dr. Jeff Gambino, ON Semiconductor , USA) (Prof. Christian Boit, TU Berlin, Germany). 10:30 -10:45 hrs Tea Break FinFET and Post-FinFET Advanced Logic Device SiP, Packaged Stacked Devices and other Challenging Reliability A Review 3D Assembly Analysis 10:45 - 12:45 hrs TUT A2 TUT B2. (Prof. Aaron Thean, NUS, Singapore) (Dr. Philippe Perdu, CNES, France).

Time 08:30 hrs 08:30 - 10:30 hrs TUT A1 BEOL Reliability - From FinFETs to More-than-Moore Devices (Dr. Jeff Gambino, ON Semiconductor , USA) TUT B1

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Transcription of IPFA 2018 TECHNICAL PROGRAM 16 - 19 July

1 IPFA 2018 TECHNICAL PROGRAM 16 - 19 July Time 16 July (Day 0) - Tutorials and Workshops Session TUT A: Tutorials Session TUT B: Tutorials 08:30 hrs Tutorial Session Chair: Alfred Quah, GLOBALFOUNDRIES Singapore Tutorial Session Chair: Venkat Krishnan Ravikumar, AMD Singapore BEOL Reliability - From FinFETs to More-than-Moore Internet of Things and Low Power Technology Devices Concepts and Fault Isolation on Chip and System Level 08:30 - 10:30 hrs TUT A1 TUT B1. (Dr. Jeff Gambino, ON Semiconductor , USA) (Prof. Christian Boit, TU Berlin, Germany). 10:30 -10:45 hrs Tea Break FinFET and Post-FinFET Advanced Logic Device SiP, Packaged Stacked Devices and other Challenging Reliability A Review 3D Assembly Analysis 10:45 - 12:45 hrs TUT A2 TUT B2. (Prof. Aaron Thean, NUS, Singapore) (Dr. Philippe Perdu, CNES, France).

2 12:40 -13:45 hrs Lunch Physical Analysis with TEM - Possibilities and Focused Ion Beam (FIB) Chip Circuit Edit Tutorial Challenges 13:45 -15:45 hrs TUT A3 TUT B3. (Dr. Steven B. Herschbein, GLOBALFOUNDRIES, USA). (Dr. Michel Bosman, IMRE, Singapore). 15:45 -16:00 hrs Tea Break Intrinsic Reliability Challenges for Non-Volatile Memory Defect localization using SEM based Current Imaging Technologies 16:00 -18:00 hrs TUT A4 TUT B4. (Dr. Mich l Simon-Najasek, IMWS, Germany). (Dr. Robin Degraeve, IMEC , Belgium). WORKSHOP: Emerging Fault Isolation Techniques Workshop Moderator: Venkat Krishnan Ravikumar, AMD Singapore 18:30 -20:00 hrs (Sponsored by HAMAMATSU Photonics). (Attendees will be served a light dinner). End of Day 0. Time 17 July (Day 1). 09:00 - 09:20am Opening Address by General Chair - Dr. Goh Szu Huat Fundamental resolution limits in lithography and inspection 09:20 -10:20am Session chair: Collin Sheppard, Honorary Professorial Fellow Goh Szu Huat University of Wollongong, Australia 10:20 -10:40am Tea Break Reliability Physics for Post-Moore Era Electronics 10:40 -11:40am Session chair: Muhammad Ashraf Alam, Professor, IEEE Fellow Goh Szu Huat Purdue University, IN, USA.

3 Session 1: Best Paper Exchange 11:40am TECHNICAL PROGRAM Chair - Nagarajan Raghavan, SUTD, Singapore ISTFA 2017. Picosecond Time Resolved LADA Integrated with a Solid Immersion Lens on a Laser Scanning Microscope Exchange 11:45 -12:15pm Kris Dickson, Paper NXP Semiconductors, Austin, TX, USA. ( ). ESREF 2017. Capacitive effects in IGBTs limiting their reliability under short circuit Exchange 12:15 -12:45pm Paula Diaz Reigosa Paper Aalborg University, Denmark ( ). 12:45 -13:45pm Lunch Session 2: Case Studies on Fault Isolation 13:45 hrs Session Chair: Christian Boit, TU Berlin, Germany Invited Is Hardware Security prepared for unexpected discoveries? 13:50 -14:20 hrs ( ) Sergei Skorobogatov - University of Cambridge, UK. Paper ID: 272 Faster Localization of Logic Soft Failures Using A Combination of Scan Diagnosis at Reduced VDD and LADA.

4 14:20 -14:40 hrs ( ) Authors: Szu Huat Goh et al., GF, Singapore Paper ID: 198 Fault Isolation of Die-to-Die Communication Error Failure 14:40 -15:00 hrs ( ) Authors: J. Song et al., NXP Semiconductors An Electrical Failure Analysis (EFA) Flow to Identify Invisible Defect Quantitatively on Individual Transistor: Using the Characterization of Paper ID: 159. 15:00 -15:20 hrs Random Dopant Fluctuation (RDF) as an Example ( ). Authors: J. Lee et al., TSMC, Taiwan Paper ID: 238 Failure analysis of multilayer-metal-packaging power devices for abnormal thermal response 15:20 - 15:40 hrs ( ) Authors: Y. Zhang et al., Inst. of Microelectronics, China 15:40 -16:00 hrs Tea Break Session 3: Device Reliability 16:00 hrs Session Chair: Mario Lanza, Soochow University, China Invited Electrochemical Oxidation, Threading Dislocations and the Reliability of GaN HEMTs 16:05 -16:35 hrs ( ) Carl V Thompson - MIT, Cambridge, USA.

5 Paper ID: 192 Detection and Characterization of Single Near-Interface Oxide Traps with the Charge Pumping Method 16:35-16:55 hrs ( ) Authors: T. Tsuchiya et al., Shizuoka Univ., Japan Paper ID: 194 Self-heating induced Variability and Reliability in Nanosheet-FETs Based SRAM. 16:55 -17:15 hrs ( ) Authors: W. Chen et al., Peking University, China Paper ID: 167 Study of the Long-Term Electrical Stability of InGaZnO 3-D Film-Profile-Engineered Inverters 17:15 -17:35 hrs ( ) Authors: Kuan et al., National Chiao Tung Univ., Taiwan Paper ID: 306 HCI-like Stress Investigation of Zinc Oxide Thin-Film Transistors with an Al2O3 Gate Dielectric 17:35 -17:55 hrs ( ) Authors: Rodriguez-Davila et al., UT Dallas, USA. End of Day 1. Time 18 July (Day 2). Session 4A: Case Studies on Physical Failure Analysis Session 4B: Interconnect and Packaging Reliability 08:00 hrs Session Chair: Alan Street, ON Semiconductor, USA Session Chair: Lim Yeow Kheng, STATSChipPac, Singapore Improving PFA accuracy and defect localization with Invited Invited Electromigration Reliability of Solder Balls 08:05 - 08:35 hrs volume scan diagnosis ( ) ( ) Christine Hau-Riege - Qualcomm, San Francisco, USA.

6 Jayant D'Souza - Mentor Graphics, Portland, USA. Electrical Characterization of FEOL Bridge Defects in A study of pattern density and process variations impact on Paper ID: 247 Advanced Nanoscale Devices Using TCAD Simulations Paper ID: 248 the reliability performance of multi-level capacitance 08:35 -08:55 hrs ( ) Authors: Teo et al., Advanced Micro Devices, ( ) structure in Low-k copper interconnects Singapore Authors: Q. Chen et al., GLOBALFOUNDRIES Singapore Failure Modes Study of Active Area Damage with Two Paper ID: 251 Paper ID: 303 Copper Wirebond Optimization for Smart Power Devices 08:55 -09:15 hrs Identified Causes using Multi-Analysis Methods ( ) ( ) Authors: T. Pinili et al., ON Semiconductor, Philippines Wu et al., Powerchip Semiconductors, Taiwan Failure Analysis Case Studies on Wafer Edge Failure due Contactless Fault Isolation on Ultra Low k Dielectrics in Soft Paper ID: 221 Paper ID: 280.

7 09:15 -09:35 hrs to Process Uniformity Issue Breakdown Condition ( ) ( ). Authors: N. Xu et al., GLOBALFOUNDRIES Singapore Authors: N. Herfurth et al., TU Berlin, Germany A Study on Effect of Top and Bottom metal plates on Stress Paper ID: 274 Induced Voiding of Nose Type Single via Structure 09:35 -09:55 hrs ( ) Authors: Kuppar et al., GLOBALFOUNDRIES. Singapore 09:55 -10:15 hrs Tea Break Session 5A: Sample Prep, Metrology & Defect Characterization Session 5B: Package Level Failure Analysis 10:15 hrs Session Chair: Vinod Narang, AMD, Singapore Session Chair: Jiann Min Chin, AMD Singapore Beyond Gallium: Evaluation of Alternate Primary Ion From PCB to BEOL: 3D X-Ray Microscopy for Invited Invited 10:20 -10:50 hrs Sources for FIB Chip Circuit Advanced Semiconductor Packaging ( ) ( ). Steven Herschbein, GLOBALFOUNDRIES, New York, USA Christian Schmidt, Carl Zeiss SMT.

8 San Francisco, USA. Through-Transmission Scanning Acoustic Tomography Quantitative Evaluation of Carrier Distribution in Silicon Paper ID: 165 Paper ID: 156 Using Capacitive Micromachined Ultrasound Transducer 10:50 -11:10 hrs Solar Cell Using Scanning Nonlinear Dielectric Microscopy ( ) ( ) (CMUT). Authors: K. Hirose et al., Tohoku University, Japan Authors: T. Takezaki et al., Hitachi Semiconductors, Japan Passive Voltage Contrast Investigation of Metal-via Stack Optimization and Application of Acoustic Imaging for Defect Paper ID: 176 Paper ID: 293. 11:10 -11:30 hrs Connecting to Substrate Detection in Stack Die Packages ( ) ( ). Authors: Y. Shen et al., GLOBALFOUNDRIES Singapore Authors: Oh et al., AMD Singapore Ultra-thin Bulk Silicon Thinning for Visible Light Probing Three-dimensional (3D) Characterization of Paper ID: 242 with High Numerical Aperture Solid Immersion Lens Laser Paper ID: 179 Electromigration Failure Mechanism of Solder Joints in 11:30 -11:50 hrs ( ) Imaging ( ) WLP using X-ray Microscopy Authors: Teo et al.

9 , AMD Singapore Authors: J. Chang et al., Samsung Electronics, Korea Innovative Package FA procedures on Flip Chip Ball Grid Problem and Solution for post-FIB TEM Sample Paper ID: 180 Paper ID: 257 Array (FCBGA) Package with Copper Pillar (CuP) bumps 11:50 -12:10 hrs Preparation on Ultra Low-k Dielectric Device ( ) ( ) Authors: M. Somintac et al., Lattice Semiconductors, Authors: Y. Pan et al., GLOBALFOUNDRIES Singapore Phillipines Lunch 12:10 -14:30 hrs Poster Session Art of FA. Session 6A: Advanced Physical Failure Analysis Techniques Session 6B: Package Level Failure Analysis 14:30 hrs Session Chair: Xing Wu, East China Normal University (ECNU), China Session Chair: Susan Li, Cypress Semiconductors, USA. Application of the SEM-EBAC technique for defect Invited Invited Failure Analysis Techniques for 3D Packages 14:35 -15:05 hrs localization in thin dielectrics ( ) ( ) Frank Altmann, Fraunhofer IMWS, Germany Mich l Simon-Najasek, Fraunhofer IMWS, Germany Resolving Trap-caused Charges by Scanning Microwave High sensitivity ultrasonic inspection technique using pulse Paper ID: 150 Paper ID: 213.

10 15:05 -15:25 hrs Microscopy compression method ( ) ( ). Authors: S. Hommel et al., Infineon Tech., Germany Authors: H. Mitsuta et al., Hitachi Semiconductors, Japan Application of Si Plasmon Imaging in Semiconductor Improved Phase Data Acquisition for Thermal Emissions Paper ID: 175 Paper ID: 294. 15:25 -15:45 hrs Failure Analysis Analysis ( ) ( ). Authors: Y. Shen et al., GLOBALFOUNDRIES Singapore Authors: W. Qiu et al., AMD Singapore Radiation hardness testing of super-junction power Package Modelling for Short Circuit Failure Analysis Paper ID: 266 Paper ID: 270. 15:45 -16:05 hrs MOSFETs by heavy ion induced SEE mapping by High Resolution Time-domain Reflectometry ( ) ( ). Authors: M. Gerold et al., EAH Jena, Germany Authors: S. Yang et al., Advantest, Singapore 16:05 -16:25 hrs Tea Break Application to a failure analysis of ultrasonic beam induced In-situ FIB PVC to Speed up Fault Isolation of Floating Paper ID: 168 Paper ID: 246 resistance change(SOBIRCH).


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