LF411 Low Offset, Low Drift JFET Input Operational ...

1 Product Sample & Technical Tools & Support &. Folder Buy Documents Software Community LF411 -N. SNOSBH6E APRIL 1998 REVISED october 2014 . LF411 -N Low Offset, Low Drift JFET Input Operational Amplifier 1 Features 3 Description . 1 Internally Trimmed Offset Voltage: mV (Max) These devices are low-cost, high-speed, JFET Input Operational amplifiers with very low Input offset Input Offset Voltage Drift : 7 V/ C (Typ) voltage and Input offset voltage Drift . They require low Low Input Bias Current: 50 pA supply current yet maintain a large gain bandwidth Low Input Noise Current: pA/ Hz product and fast slew rate.

2 In addition, well matched Wide Gain Bandwidth: 3 MHz (Min) high voltage JFET Input devices provide very low Input bias and offset currents. The LF411 is pin High Slew Rate: 10 V/ s (Min) compatible with the standard LM741 allowing Low Supply Current: mA designers to immediately upgrade the overall High Input Impedance: 1012 performance of existing designs. Low Total Harmonic Distortion: These amplifiers may be used in applications such as Low 1/ Noise Corner: 50 Hz high speed integrators, fast D/A converters, sample and hold circuits and many other circuits requiring low Fast Settling Time to : 2 s Input offset voltage and Drift , low Input bias current, high Input impedance, high slew rate and wide 2 Applications bandwidth.

3 High Speed Integrators Device Information(1). Fast D/A Converters PART NUMBER PACKAGE BODY SIZE (NOM). Sample and Hold Circuits LF411 -N 8-Pin PDIP (1) For all available packages, see the orderable addendum at the end of the data sheet. Inverting Amplifier with VOS Adjust 1. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LF411 -N. SNOSBH6E APRIL 1998 REVISED october 2014 Table of Contents 1 Features .. 1 Functional Block Diagram.

4 11. 2 Applications .. 1 Feature 11. 3 Description .. 1 Device Functional 11. 4 Revision 2 8 Application and Implementation .. 13. Application 13. 5 Pin Configuration and Functions .. 3. Typical Applications .. 13. 6 4. Absolute Maximum Ratings .. 4 9 Power Supply 16. Handling 4 10 16. Recommended Operating 4 Layout Guidelines .. 16. Thermal Information .. 4 Layout Example .. 16. DC Electrical Characteristics .. 5 11 Device and Documentation Support .. 17. AC Electrical 5 Trademarks .. 17. Typical Performance Characteristics .. 6 Electrostatic Discharge Caution .. 17. Pulse Response (RL=2 k , CL=10 pF).

5 10 Glossary .. 17. 7 Detailed Description .. 11 12 Mechanical, Packaging, and Orderable Overview .. 11 Information .. 17. 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (March 2013) to Revision E Page Added Handling Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .. 1. Changed Input Offset Voltage Drift Feature from Max to Typ.

6 1. Deleted the word "specified" in first sentence of Description 1. Deleted note.. 5. Deleted VOS/ T Max specification for LM411A.. 5. Deleted VOS/ T Max specification for LM411.. 5. Changes from Revision C (March 2013) to Revision D Page Changed layout of National Data Sheet to TI format .. 12. 2 Submit Documentation Feedback Copyright 1998 2014 , Texas Instruments Incorporated Product Folder Links: LF411 -N. LF411 -N. SNOSBH6E APRIL 1998 REVISED october 2014 . 5 Pin Configuration and Functions TO. 8-Pin PDIP. Top View 8-Pin Top View NOTE: See Package Number NEV0008A. NOTE: Pin 4 connected to case.

7 NOTE: See Package Number P0008E. Pin Functions PIN. I/O DESCRIPTION. NAME NO. Balance 1 I VOS Balance Inverting 2 I Inverting Input Input Non-Inverting 3 I Non-Inverting Input Input V- 4 P Negative Supply Balance 5 I VOS Balance Output 6 O Output V+ 7 P Positive Supply NC 8 NC No Connect Copyright 1998 2014 , Texas Instruments Incorporated Submit Documentation Feedback 3. Product Folder Links: LF411 -N. LF411 -N. SNOSBH6E APRIL 1998 REVISED october 2014 6 Specifications Absolute Maximum Ratings (1). LF411A LF411 UNIT. MIN MAX MIN MAX. Supply Voltage 22 18 V. Differential Input Voltage 38 30 V.

8 (2). Input Voltage Range 19 15 V. Output Short Circuit Duration Continuous Continuous TO Package PDIP Package UNIT. MIN MAX MIN MAX. Power Dissipation (3) (4). 670 670 mW. Tjmax 150 115 C. (5) (5). Operating Temperature See See Lead Temperature (Soldering, 10 s) 260 260 C. (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. (2) Unless otherwise specified the absolute maximum negative Input voltage is equal to the negative power supply voltage.

9 (3) For operating at elevated temperature, these devices must be derated based on a thermal resistance of jA. (4) Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside specified limits. (5) These devices are available in both the commercial temperature range 0 C TA 70 C and the military temperature range 55 C TA 125 C. The temperature range is designated by the position just before the package type in the device number. A C . indicates the commercial temperature range and an M indicates the military temperature range.

10 The military temperature range is available in the TO package only. Handling Ratings MIN MAX UNIT. Tstg Storage temperature range 65 150 C. Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted). MIN NOM MAX UNIT. Supply Voltage LF411A 20 V. Supply Voltage LF411 15 V. Thermal Information TO PDIP. THERMAL METRIC (1) UNIT. 8 PINS 8 PINS. R JA Still Air 162. Junction-to-ambient thermal resistance 400 LF/min Air Flow 65. C/W. R JA Junction-to-ambient thermal resistance 120. R JC Junction-to-case (top) thermal resistance 20. (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.