Transcription of MIXED SIGNAL MICROCONTROLLER - Texas Instruments
1 JANUARY2014 REVISEDJANUARY2014 MIXEDSIGNALMICROCONTROLLER1 FEATURES2 LowSupplyVoltageRange: V Downto VSource(REFO) UltralowPowerConsumption 32-kHzCrystals ActiveMode(AM): High-FrequencyCrystalsup to 32 MHz(1)All SystemClocksActive 16-BitTimerTA0,Timer_AWithFive230 A/MHzat 8 MHz, V, FlashProgramCapture/CompareRegistersExec ution(Typical) 16-BitTimerTA1,Timer_AWithThree110 A/MHzat 8 MHz, V, RAMP rogramCapture/CompareRegistersExecution( Typical) 16-BitTimerTB0,Timer_BWithSeven StandbyMode(LPM3).
2 Capture/CompareShadowRegistersReal-TimeC lockWithCrystal,Watchdog, Up to FourUniversalSerialCommunicationand SupplySupervisorOperational,FullInterfac esRAMR etention,FastWake-Up: USCI_A0,USCI_A1,USCI_A2,and A at V, A at V (Typical)EachSupportingLow-PowerOscillat or(VLO),General-PurposeCounter,Watchdog, and Supply EnhancedUART supportingAuto-SupervisorOperational,Ful l RAMB audrateDetectionRetention,FastWake-Up: IrDAEncoderand A at V (Typical) SynchronousSPI Off Mode(LPM4): USCI_B0,USCI_B1,USCI_B2,and USCI_B3 Full RAMR etention,SupplySupervisorEachSupportingO perational,FastWake-Up: A at V (Typical) SynchronousSPI ShutdownMode( ).
3 12-BitAnalog-to-Digital(A/D) A at V (Typical) InternalReference Wake-UpFromStandbyModein s(Typical) Sample-and-Hold 16-BitRISCA rchitecture AutoscanFeature ExtendedMemory 14 ExternalChannels,2 InternalChannels Up to 25-MHzSystemClock HardwareMultiplierSupporting32-BitOperat ions FlexiblePowerManagementSystem SerialOnboardProgramming,No External FullyIntegratedLDOWithProgrammableProgra mmingVoltageNeededRegulatedCoreSupplyVol tage ThreeChannelInternalDMA SupplyVoltageSupervision,Monitoring.
4 And Brownout BasicTimerWithReal-TimeClockFeature UnifiedClockSystem For CompleteModuleDescriptions,See theMSP430x5xxandMSP430x6xxFamilyUser's FLL ControlLoopfor FrequencyGuide(SLAU208)Stabilization WideOperationalRange:-40 C to 125 C (Q Low-Power/Low-FrequencyInternalClockTemp ),-55 C to 125 C (M Temp)(SomeNotedSource(VLO)ParametersSpec ifiedfor 40 C to 85 C Only)(1)Use of crystalsis not ensuredabove85 C for both32-kHzand high awarethat an importantnoticeconcerningavailability,st andardwarranty,and use in criticalapplicationsofTexasInstrumentsse miconductorproductsand disclaimerstheretoappearsat the end of this trademarksare the propertyof currentas of 2014,TexasInstrumentsIncorporatedProduct sconformto specificationsper the termsof the all JANUARY2014 ,AEROSPACE.
5 ANDMEDICALAPPLICATIONS ControlledBaseline OneAssemblyand TestSite OneFabricationSite Availablein Extended( 55 C to 125 C)TemperatureRange ExtendedProductLife Cycle ExtendedProduct-ChangeNotification ProductTraceabilityDESCRIPTIONThe msp430f5438a -EPis an architecture,combinedwithextensivelow-po wermodes,is optimizedto achieveextendedbatterylife in devicefeaturesa powerful16-bitRISCCPU,16-bitregisters,an d constantgeneratorsthat contributeto digitallycontrolledoscillator(DCO)allows wake-upfromlow-powermodesto s (typical).
6 The msp430f5438a -EPis a microcontrollerconfigurationwiththree16- bittimers,a highperformance12-bitanalog-to-digital(A /D)converter,up to four universalserialcommunicationinterfaces(U SCI),hardwaremultiplier,DMA,real-timeclo ckmodulewith alarmcapabilities,and up to 87 I/O this deviceincludeanalogand digitalsensorsystems,digitalmotorcontrol ,remotecontrols,thermostats,digitaltimer s,and SummaryUSCIF lashSRAMADC12_APackageChannelA:ChannelB: DeviceTimer_A(1)Timer_B(2)I/O(KB)(KB)(Ch )TypeUART,IrDA,SPI, I2 CSPI113 GQW, msp430f5438a -EP256165, 374414 ext, 2 int87100 PZ(1)Eachnumberin the sequencerepresentsan instantiationof Timer_Awith its associatednumberof capturecompareregistersand example,a numbersequenceof 3, 5 wouldrepresenttwo instantiationsof Timer_A,the firstinstantiationhaving3 and the secondinstantiationhaving5 capturecompareregistersand PWMoutputgenerators,respectively.
7 (2)Eachnumberin the sequencerepresentsan instantiationof Timer_Bwith its associatednumberof capturecompareregistersand example,a numbersequenceof 3, 5 wouldrepresenttwo instantiationsof Timer_B,the firstinstantiationhaving3 and the secondinstantiationhaving5 capturecompareregistersand PWMoutputgenerators, (1)TAPACKAGE(2)ORDERABLEPARTNUMBERTOP-SI DEMARKINGVID NUMBER 40 C to 125 CPBGA- GQWM430F5438 AQGQWREPMF5438 AQEPV62/14608-01 XEPBGA- GQWM430F5438 AMGQWTEPMF5438 AMEPV62/14608-02XE 55 C to 125 CPQFP- PZMSP430F5438 AMPZREPMF5438 AMEPV62/14608-02YE(1)For the mostcurrentpackageand orderinginformation,see the PackageOptionAddendumat the end of this document,or see the TIwebsiteat (2)
8 Packagedrawings,standardpackingquantitie s,thermaldata,symbolization,and PCBdesignguidelinesare 2014,TexasInstrumentsIncorporatedA1A2A3A 4A5A6A7A8A9A10A11 A12B1B2B3B4B5B6B7B8B9B10B11 B12C1C2C3C11 C12D1D2D4D5D6D7D8D9D11 D12E1E2E4E5E6E7E8E9E11 E12F1F2F4F5F8F9F11F12G1G2G4G5G8G9G11 G12J1J2J4J5J6J7J8J9J11J12H1H2H4H5H6H7H8H 9H11 H12K1K2K11 K12L1L2L3L4L5L6L7L8L9L10L11L12M1M2M3M5M6 M7M8M9M10M11 M12M4 GQW PACKAGE(TOP VIEW) DVSS4 DVCC4 JANUARY2014 REVISEDJANUARY2014 Pin DesignationsCopyright 2014,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback3PZ PACKAGE(TOP VIEW) +/VeREF+ /VeREF JANUARY2014 2014,TexasInstrumentsIncorporatedUnified ClockSystem256KB192KB128 KBFlash16 KBRAMMCLKACLKSMCLKI/O PortsP1/P22 8 I/OsInterruptCapabilityPA1 16 I/OsCPUXV2andWorkingRegistersEEM(L.)
9 8+2)XINXOUTJTAG/InterfaceSBWPAPBPCPDDMA3 ChannelXT2 INXT OUT2 PEPowerManagementLDOSVM/BrownoutSVSSYSW atchdogPFI/O PortsP3/P42 8 I/OsPB1 16 I/OsI/O PortsP5/P62 8 I/OsPC1 16 I/OsI/O PortsP7/P82 8 I/OsPD1 16 I/OsI/O PortsP9/P102 8 I/OsPE1 16 I/OsI/O PortsP111 3 I/OsPF1 3 I/OsMPY32TA0 Timer_A5 CCRegistersTA1 Timer_A3 CCRegistersTB0 Timer_B7 CCRegistersRTC_ACRC16 USCI0,1,2,3 USCI_Ax:UART,IrDA, SPIUCSI_Bx:SPI, I2 CADC12_A200 KSPS16 Channels(14 ext/2 int)Autoscan12 JANUARY2014 REVISEDJANUARY2014 FunctionalBlockDiagramCopyright 2014,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback5 msp430f5438a -EPSLAS967A JANUARY2014 (1)
10 DESCRIPTIONNAMEGQWPZG eneral- ADCG eneral- ADCG eneral- ADCG eneral- ADCG eneral- ADCG eneral- ADCG eneral- ADCG eneral- ADCG eneral-purposedigitalI/OAnaloginputA8 +/VeREF+D19I/OOutputof referencevoltageto the ADCI nputfor an externalreferencevoltageto the ADCG eneral-purposedigitalI/OAnaloginputA9 the ADC'sreferencevoltagefor bothsources,theinternalreferencevoltage, or an externalappliedreferencevoltageAVCCE211 AnalogpowersupplyAVSSF212 AnaloggroundsupplyGeneral- crystaloscillatorXT1 General- crystaloscillatorXT1 DVSS1G215 DigitalgroundsupplyDVCC1H216 DigitalpowersupplyGeneral-purposedigital I/O with port clocksignalTACLK inputACLK output(dividedby 1, 2, 4, 8, 16, or 32)General-purposedigitalI/O with port CCR0capture:CCI0 Ainput,compare:Out0outputBSL transmitoutputGeneral-purposedigitalI/O with port CCR1capture:CCI1 Ainput,compare.
