Transcription of (MMIC)を用いた電力増幅器及び A. 最終品目、装置 …
1 Commerce Control List Supplement No. 1 to Part 774 Category 3(Electronics) page 1 Export Administration Regulations 3 A. " " " " " " " " " " " " " " 3A001 3A002 " " " " 3A001 NS RS MT NP AT Control(s) Country Chart 738 1 NS NS Column 1 " " ("MMIC") " " (MMIC)
2 ECCN NS NS Column 2 RS RS Column 1 " " ("MMIC") " " (MMIC) ECCN MT MT Column 1 " " -54 C +125 C " " NP NP Column 1 AT AT Column 1 5 GFLOPS 32 " " " " " " " " " " EAR 740 LVS.
3 MT NP " " ("MMIC") " " (MMIC) Commerce Control List Supplement No. 1 to Part 774 Category 3(Electronics) page 2 Export Administration Regulations Yes $1500: $3000: .d .e .f .g $5000: MT ..12 GBS MT 18 GHz TWTA( ).
4 G .h Yes CIV Yes STA A:5 A:6 EAR 740 1 STA (1) " "' ' USML XV "ITAR " ASIC ' ' ' ' USML XI 22 CFR 120 130 (2) 3A101 3A201 3A611 3A991 9A515 ' ' 5,000 500,000 5,000,000 / 500,000,000 / 22 CFR part 121 a.
5 " " " " ("MMICs") 5,000 5 10 / ; 1 5 10 n/cm - - MIS " " " " Commerce Control List Supplement No. 1 to Part 774 Category 3(Electronics) page 3 Export Administration Regulations " " " " FFT (EEPROM) (SRAM) MRAM 398K(125 C) ; 218K(-55 C) 218K(-55 C) 398K(125 C).
6 40 MHz [Reserved] ADC DAC ADC 8 10 GSPS 1 ; 10 12 600 MSPS 500 / ; 12 14 400 MSPS 200 / ; 14 16 250 MSPS 250 / 16 65 MSPS 65 / Technical Notes 1.
7 N 2 2. ADC 3. 4. ' ADC' 5. ' ADC' ' ADC' 6. (MHz) (MSPS) 7. 1 1 1 1Hz 1 1Hz 1 8. ' ADC' ADC ADC Commerce Control List Supplement No.
8 1 to Part 774 Category 3(Electronics) page 4 Export Administration Regulations 9. ' ADC' ADC a. 5. b. DAC ; 10 " " 3,500 MSPS[ ] 12 " " 1,250 MSPS[ ] 12 " " 9 100 MHz 100 MHz ' SFDR 68 dBc[dB to carrier ] Technical Notes 1.
9 ' ' SFDR DAC 2. SFDR SFDR 3. SFDR 3dB 4. DAC " " a. DAC ' ' DAC 1 DAC DAC b. DAC DAC ' ' DAC DAC ' ' input data rate[ ] input word rate[ ] input sample rate[ ] maximum total input bus rate[ ] maximum DAC clock rate for DAC clock input[DAC DAC ] ; 700.
10 ' ' 1 500 SPLD CPLD FPGA FPLA FPIC Commerce Control List Supplement No. 1 to Part 774 Category 3(Electronics) page 5 Export Administration Regulations Technical Notes 1. 2. ' ' FPGA[ ] [RESERVED] 1,500 3 GHz 3,000 FFT FFT (N log2 N )
