MSP430FR2422 Mixed-Signal Microcontroller …

1 ProductFolderOrderNowTechnicalDocumentsT ools &SoftwareSupport &CommunityAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand JANUARY2018 REVISEDAUGUST2018 MSP430FR2422 Mixed-SignalMicrocontroller1 EmbeddedMicrocontroller 16-BitRISCA rchitecture ClockSupportsFrequenciesup to 16 MHz V Downto V (MinimumSupplyVoltageis Restrictedby SVSL evels,See the SVSS pecifications) OptimizedUltra-Low-PowerModes ActiveMode:120 A/MHz(Typical) ,Real-TimeClock(RTC)CounterWith32768-HzC rystal:710 nA(Typical) Shutdown( ):36 nA withoutSVS Low-PowerFerroelectricRAM(FRAM) Up to KB of NonvolatileMemory Built-InErrorCorrectionCode(ECC) ConfigurableWriteProtection UnifiedMemoryof Program,Constants,andStorage 1015 WriteCycleEndurance RadiationResistantand Nonmagnetic HighFRAM-to-SRAMR atio,up to 4.

2 1 High-PerformanceAnalog Up to 8-Channel10-BitAnalog-to-DigitalConverte r(ADC) Sample-and-Hold200 ksps IntelligentDigitalPeripherals Two 16-BitTimerWithThreeCapture/CompareRegis tersEach(Timer_A3) One 16-BitCounter-OnlyRTC 16-BitCyclicRedundancyCheck(CRC) EnhancedSerialCommunicationsWithSupportf orPin RemapFeature(SeeDeviceComparison) One eUSCI_ASupportsUART,IrDA,and SPI One eUSCI_BSupportsSPI and I2C ClockSystem(CS) On-Chip32-kHzRC Oscillator(REFO) On-Chip16-MHzDigitallyControlledOscillat or(DCO)WithFrequency-LockedLoop(FLL) 1% AccuracyWithOn-ChipReferenceatRoomTemper ature On-ChipVeryLow-Frequency10-kHzOscillator (VLO) On-ChipHigh-FrequencyModulationOscillato r(MODOSC) External32-kHzCrystalOscillator(LFXT) ProgrammableMCLKP rescalarof 1 to 128 SMCLKD erivedfromMCLKWithProgrammablePrescalaro f 1, 2, 4, or 8 GeneralInput/Outputand Pin Functionality Totalof 15 I/Os on VQFN-20 Package 15 InterruptPins(P1 and P2) Can WakeMCUFromLow-PowerModes DevelopmentToolsand Software DevelopmentTools MSP-TS430 RHL20 TargetDevelopmentKit FamilyMembers(AlsoSee DeviceCharacteristics) MSP430FR2422 ProgramFRAM+256 Bof InformationFRAM+ 2KB of RAM PackageOptions 20-Pin:VQFN(RHL) 16-Pin:TSSOP(PW) For CompleteModuleDescriptions,See theMSP430FR4xxand MSP430FR2xxFamilyUser' IndustrialSensors BatteryPacks PortableAppliances ElectricToothbrushes Low-PowerMedical,Health,and Fitness2 MSP430FR2422 SLASEE5A JANUARY2018.

3 MSP430FR2422 DeviceOverviewCopyright 2018, part of the MSP430 valueline Microcontroller (MCU)portfolio,TI s lowestcost familyof MCUsfor an architecture,FRAM,and integratedperipherals,combinedwith extensivelow-powermodes,are optimizedto achieveextendedbatterylife in a 16-pinTSSOPor a 's MSP430ultra-low-powerFRAM microcontrollerplatformcombinesuniquelye mbeddedFRAMand aholisticultra-low-powersystemarchitectu re,allowingsystemdesignersto low-energyfast writes,flexibility,andenduranceof RAMwith the nonvolatilityof MSP430FR2422 MCUis supportedby an extensivehardwareand softwareecosystemwith referencedesignsandcodeexamplesto get includethe also providesfree MSP430 Ware software, whichisavailableas a componentof CodeComposerStudio IDE desktopand cloudversionswithinTI ResourceExplorer. TheMSP430 MCUsare alsosupportedby extensiveonlinecollateral,training,and onlinesupportthroughthe E2E CommunityForum.

4 (1)For the mostcurrentpart,package,and orderinginformation,see thePackageOptionAddenduminSection9, or see the TI websiteat (2)The sizesshownhereare the packagedimensionswith tolerances,see theMechanicalDatain (1)PARTNUMBERPACKAGEBODYSIZE(2)MSP430FR2 422 IPW16 TSSOP(16)5 mm mmMSP430FR2422 IRHLVQFN(20) mm mmCAUTIONS ystem-levelESDprotectionmustbe appliedin compliancewiththe device-levelESDspecificationto preventelectricaloverstressor disturbingof +256 BRAM2 KBWatchdogSYSCRC1616-bitCyclicRedundancy CheckJTAGSBW2 TATimer_A33 CCRegistersEEMMABMDB16-MHz RegistersPowerManagementModuleeUSCI_A0(U ART,IrDA, SPI)eUSCI_B0(SPI, I C)2 RTCC ounter16-bitReal-TimeClockI/O PortsP1 :Interrupt,Wakeup,PA : 15 IOs8 IOsP2 : 7 DomainSBWTDIOSBWTCKTDOTDI/TCLKTMSTCKADC8 channelsSingle-end10 bit200 kspsCopyright 2016, Texas Instruments JANUARY2018 REVISEDAUGUST2018 SubmitDocumentationFeedbackProductFolder Links: MSP430FR2422 DeviceOverviewCopyright 2018, showsthe FunctionalBlockDiagram The MCUhas one mainpowerpair of DVCCand DVSS that suppliesdigitaland decouplingcapacitorsare F to 10 F and F, respectively,with 5% accuracy.

5 P1 and P2 featurethe pin interruptfunctionand can wakeup the MCUfromall LPMs, LPM4. EachTimer_A3hasthreecapture/compareregis ters,but onlyCCR1andCCR2are be usedonly for internalperiodtimingand interruptgeneration. In ,the RTCmodulecan be functionalwhilethe rest of the peripheralsare JANUARY2018 : MSP430FR2422 Tableof ContentsCopyright 2018,TexasInstrumentsIncorporatedTableof Contents1 TerminalConfigurationand (LPM0)SupplyCurrentsInto (LPM3,LPM4)SupplyCurrents(IntoVCC) ( )SupplyCurrents(IntoVCC) (BSL).. (SBW).. Applications,Implementation,and Deviceand Mechanical,Packaging,and JANUARY2018 REVISEDAUGUST2018 SubmitDocumentationFeedbackProductFolder Links: MSP430FR2422 RevisionHistoryCopyright 2018,TexasInstrumentsIncorporated2 RevisionHistoryNOTE:Pagenumbersfor previousrevisionsmay differfrompagenumbersin the , 2018to August28, 2018 Page Changedlist item " V Downto " in , , ChangedHBMlimit to 1000V and CDMlimit to 250 V in , Changedthe MIN valueof the VCCparameterfrom2 V to V in , Changedthe crystalin the footnotethat begins"Characterizedwith a " ,Low-PowerMode(LPM3,LPM4)SupplyCurrents( IntoVCC) Changedthe crystalin the footnotethat begins"Characterizedwith a " ,Low-PowerMode( )SupplyCurrents(IntoVCC) Addednoteon VSVSH-and VSVSH+parametersto Table5-2,PMM,SVSand Changedthe V to V in the test conditionsfor the fREFO, dfREFO/ dVCC, and fDCparametersand in note(2) in Table5-7, Changedthe V to V in the test conditionsfor the dfVLO/dVCCparameterand in note(2) in Table5-8,InternalVery-Low-PowerLow-Frequ encyOscillator(VLO).

6 23 Changedthe V to V in the test conditionsfor the fMODOSC/dVCCparameterin Table5-9,ModuleOscillator(MODOSC)..236 MSP430FR2422 SLASEE5A JANUARY2018 : MSP430FR2422 DeviceComparisonCopyright 2018,TexasInstrumentsIncorporated(1)For the mostcurrentpackageand orderinginformation,see thePackageOptionAddendumin Section9, or see the TI (2)Packagedrawings,standardpackingquanti ties,thermaldata,symbolization,and PCBdesignguidelinesare (3)A CCRregisteris a configurableregisterthat providesinternaland externalcaptureor compareinputs,or internaland DeviceComparisonTable3-1 summarizesthe featuresof the DeviceComparison(1)(2)DEVICEPROGRAMFRAM+ INFORMATIONFRAM(bytes)SRAM(bytes)TA0,TA1 eUSCI_AeUSCI_B10-BITADCCHANNELSGPIOsPACK AGEMSP430FR2422 IRHL7424+ 25620482, 3 CCR(3)1181520 RHL(VQFN) MSP430FR2422 IPW167424+ 25620482, 3 CCR(3)1151116 PW(TSSOP) informationaboutotherdevicesin this familyof productsor relatedproducts,see the 16-bitand 32-bitMicrocontrollersHigh-performance,l ow-powersolutionsto enablethe autonomousfutureProductsfor MSP430 Ultra-Low-PowerSensingand MSP430 CapacitiveSensingMicrocontrollersCapTIva teMCUs:Lowestpowerand mostnoiseimmunecapacitivetouchsolutionsC ompanionProductsfor MSP430FR2422 Reviewproductsthat are frequentlypurchasedor usedinconjunctionwith this DesignsReferenceDesignLibraryis a robustreferencedesignlibrarythat spansanalog,embeddedprocessor,and TI expertsto help you jumpstartyoursystemdesign,all TI Designsincludeschematicor blockdiagrams,BOMs,and designfiles to speedyourtime to + + + + 3 4 5 6 JANUARY2018 REVISEDAUGUST2018 SubmitDocumentationFeedbackProductFolder Links.

7 MSP430FR2422 TerminalConfigurationand FunctionsCopyright 2018,TexasInstrumentsIncorporated4 TerminalConfigurationand DiagramsFigure4-1 showsthe pinoutof the 20-PinRHLP ackage(TopView)Figure4-2 showsthe pinoutof the 16-pinPW 16-PinPW Package(TopView)8 MSP430FR2422 SLASEE5A JANUARY2018 : MSP430FR2422 TerminalConfigurationand FunctionsCopyright 2018,TexasInstrumentsIncorporated(1)Sign alsnameswith (RD)denotethe resetdefaultpin name.(2)To determinethe pin mux encodingsfor eachpin, see (3)SignalTypes:I = Input,O = Output,I/O = Inputor Output(4)BufferTypes:LVCMOS,Analog,or Power(seeTable4-3)(5)The powersourceshownin this tableis the I/O powersource,whichmay differfromthe modulepowersource.(6)ResetStates:OFF= High-impedancewith Schmitttriggerand pullupor pulldown(if available)disabledN/A = Not AttributesTable4-1 lists the attributesof all Pin AttributesPIN NUMBERSIGNALNAME(1) (2)SIGNALTYPE(3)BUFFERTYPE(4)POWERSOURCE (5)RESETSTATEAFTERBOR(6) (RD)I/OLVCMOSDVCCOFFUCB0 CLKI/OLVCMOSDVCC ACLKI/OLVCMOSDVCC A1 IAnalogDVCC VREF+IAnalogPower (RD)I/OLVCMOSDVCCOFFUCB0 STEI/OLVCMOSDVCC A0 IAnalogDVCC Veref+IAnalogPower 33 TEST(RD)ILVCMOSDVCCOFFSBWTCKILVCMOSDVCC 44 RST(RD)ILVCMOSDVCCOFFNMIILVCMOSDVCC SBWTDIOI/OLVCMOSDVCC 55 DVCCPP owerDVCCN/A66 (RD)I/OLVCMOSDVCCOFFUCA0 RXDILVCMOSDVCC UCA0 SOMII/OLVCMOSDVCC XINILVCMOSDVCC (RD)I/OLVCMOSDVCCOFFUCA0 TXDOLVCMOSDVCC UCA0 SIMOI/OLVCMOSDVCC XOUTOLVCMOSDVCC 9 (RD)I/OLVCMOSDVCCOFFUCB0 SOMII/OLVCMOSDVCC UCB0 SCLI/OLVCMOSDVCC 10 (RD)I/OLVCMOSDVCCOFFUCB0 SIMOI/OLVCMOSDVCC UCB0 SDAI/OLVCMOSDVCC A7 IAnalogDVCC 11 (RD)

8 I/OLVCMOSDVCCOFFTA1 CLKILVCMOSDVCC UCB0 CLKI/OLVCMOSDVCC A6 IAnalogDVCC JANUARY2018 REVISEDAUGUST2018 SubmitDocumentationFeedbackProductFolder Links: MSP430FR2422 TerminalConfigurationand FunctionsCopyright 2018,TexasInstrumentsIncorporatedTable4- 1. Pin Attributes(continued)PIN NUMBERSIGNALNAME(1) (2)SIGNALTYPE(3)BUFFERTYPE(4)POWERSOURCE (5)RESETSTATEAFTERBOR(6)RHLPW1612 (RD) UCB0 STEI/OLVCMOSDVCC A5 IAnalogDVCC (RD) A4 IAnalogDVCC (RD)I/OLVCMOSDVCCOFFUCA0 STEI/OLVCMOSDVCC TDOOLVCMOSDVCC (RD)I/OLVCMOSDVCCOFFUCA0 CLKI/OLVCMOSDVCC TA0 CLKILVCMOSDVCC TDIILVCMOSDVCC TCLKILVCMOSDVCC (RD)I/OLVCMOSDVCCOFFUCA0 RXDILVCMOSDVCC UCA0 SOMII/OLVCMOSDVCC TMSILVCMOSDVCC (RD)I/OLVCMOSDVCCOFFUCA0 TXDOLVCMOSDVCC UCA0 SIMOI/OLVCMOSDVCC TCKILVCMOSDVCC 1814 DNC (RD)I/OLVCMOSDVCCOFFUCB0 SOMII/OLVCMOSDVCC UCB0 SCLI/OLVCMOSDVCC MCLKOLVCMOSDVCC A3 IAnalogDVCC (RD)I/OLVCMOSDVCCOFFUCB0 SIMOI/OLVCMOSDVCC UCB0 SDAI/OLVCMOSDVCC SMCLKOLVCMOSDVCC A2 IAnalogDVCC Veref-IAnalogPower 10 MSP430FR2422 SLASEE5A JANUARY2018 : MSP430FR2422 TerminalConfigurationand FunctionsCopyright 2018,TexasInstrumentsIncorporated(1)Pin Types.

9 I = Input,O = Output,I/O = Inputor Output,P = Power(2)Becausethis pin is multiplexedwith the JTAG function,TI recommendsdisablingthe pin interruptfunctionwhilein describesthe signalsfor all devicevariantsand SignalDescriptionsFUNCTIONSIGNALNAMEPIN NUMBERPINTYPE(1)DESCRIPTIONRHLPWADCA022 IAnaloginputA0A111 IAnaloginputA1A22016 IAnaloginputA2A31915 IAnaloginputA3A4119 IAnaloginputA4A512 IAnaloginputA5A69 IAnaloginputA6A713 IAnaloginputA7 Veref+22 IADC positivereferenceVeref-2016 IADC negativereferenceClockACLK11I/OACLK outputMCLK1915 OMCLK outputSMCLK2016 OSMCLK outputXIN77 IInputterminalfor crystaloscillatorXOUT88 OOutputterminalfor crystaloscillatorDebugSBWTCK33 ISpy-Bi-WireinputclockSBWTDIO44I/OSpy-Bi -Wiredatainput/outputTCK1713 ITestclockTCLK1511 ITestclockinputTDI1511 ITestdatainputTDO1410 OTestdataoutputTEST33 ITestmodepin selecteddigitalI/O on (2) (2) (2) (2) I/OGeneral- I/OGeneral- I/OGeneral- I/OGeneral- JANUARY2018 REVISEDAUGUST2018 SubmitDocumentationFeedbackProductFolder Links: MSP430FR2422 TerminalConfigurationand FunctionsCopyright 2018,TexasInstrumentsIncorporatedTable4- 2.

10 SignalDescriptions(continued)FUNCTIONSIG NALNAMEPIN NUMBERPINTYPE(1)DESCRIPTIONRHLPW(3)These signalassignmentsare controlledby the USCIARMPbit of the SYSCFG3registeror the USCIBRMPbit of the groupcan be selectedat one time.(4)Signalassignmentson thesepins are controlledby the remapfunctionalityand are selectedby the USCIARMPbit in the groupcan be selectedat one CLKand STEassignmentsare fixedand sharedby bothSPI (3)1915I/OeUSCI_B0I2C clockUCB0 SDA(3)2016I/OeUSCI_B0I2C dataUCB0 SCL(3)9 I/OeUSCI_B0I2C clockUCB0 SDA(3)10 I/OeUSCI_B0I2C dataPowerDVCC55 PPowersupplyDVSS66 PPowergroundVREF+11 POutputof positivereferencevoltagewith groundas referenceSPIUCA0 STE1410I/OeUSCI_A0 SPI slavetransmitenableUCA0 CLK1511I/OeUSCI_A0 SPI clockinput/outputUCA0 SOMI(3)(4)1612I/OeUSCI_A0 SPI slaveout/masterinUCA0 SIMO(3)(4)1713I/OeUSCI_A0 SPI slavein/masteroutUCA0 SOMI(3)(4)77I/OeUSCI_A0 SPI slaveout/masterinUCA0 SIMO(3)(4)88I/OeUSCI_A0 SPI slavein/masteroutUCB0 STE(3)22I/OeUSCI_B0slavetransmitenableUC B0 CLK(3)11I/OeUSCI_B0clockinput/outputUCB0 SOMI(3)1915I/OeUSCI_B0 SPI slaveout/masterinUCB0 SIMO(3)