Natural Interleaving Transition-Mode PFC …

1 710613114161192458153 CSVINACTSETVREFAGND PGNDHVSENCOMPPHBVSENSEPWMCNTLGDBZCDBGDAZ CDAUCC2806312 VCC+ EMIF ilter85 VACto 265 VACP hase ManagementPower Good toDown StreamConverter400 VDCC opyright 2016, Texas Instruments Incorporated7012017022027012345 Input Voltage (V)Capacitor ripple current (A)1-phase TM1-phase CCM2-phase TM InterleaveRipple Current ReductionPOUT= 600 WVOUT= 400 VProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunityAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand SEPTEMBER2011 REVISEDNOVEMBER2016 UCC28063 NaturalInterleaving transition -ModePFC ControllerWith ImprovedAudibleNoise Immunity1 Features11 InputFilterand OutputCapacitorRipple-CurrentCancellatio n ReducedCurrentRipplefor HigherSystemReliabilityand SmallerBulkCapacitor ReducedEMI FilterSize PhaseManagementCapability Fail-SafeOVPwith DualPathsPreventsOutputOvervoltageCondit ionsby Voltage-SensingFailures SensorlessCurrent-ShapingSimplifiesBoard Layoutand ImprovesEfficiency AdvancedAudibleNoisePerformance Non-linearError-AmplifierGain

2 Soft Recoveryon Overvoltage IntegratedBrownoutand DropoutHandling ReducedBiasCurrents ImprovedEfficiencyand DesignFlexibilityOverTraditionalSingle-P haseContinuousConductionMode(CCM) Inrush-SafeCurrentLimiting: PreventsMOSFETC onductionDuringInrush EliminatesreverseRecoveryEventsin Outputrectifiers EnablesUse of Low-CostDiodesWithoutExtensiveSnubberCir cuitry ImprovedLight-LoadEfficiency Fast,SmoothTransientResponse ExpandedSystem-LevelProtections 1-A 40 C to 125 C OperatingTemperatureRangeina 16-LeadSOICP ackage2 Applications 100-Wto 800-WPowerSupplies Gaming D-to-ASet-TopBoxes Adapters LCD,Plasmaand DLP TVs HomeAudioSystems3 DescriptionOptimizedfor consumerapplicationsconcernedwithaudible noiseelimination.

3 This solutionextendstheadvantagesof transitionmode highefficiencywithlow-costcomponents to NaturalInterleaving technique,bothchannelsoperateasmasters(t hatis, thereis no slavechannel)synchronizedto the ,fasterresponses,and ensuresthat eachchanneloperatesin (1)PARTNUMBERPACKAGEBODYSIZE(NOM)UCC2806 3 SOIC(16) (1) For all availablepackages,see the orderableaddendumatthe end of the SEPTEMBER2011 :UCC28063 SubmitDocumentationFeedbackCopyright 2011 2016,TexasInstrumentsIncorporatedTableof Contents1 Description(Continued)..36 Pin Configurationand Applicationsand Deviceand Mechanical,Packaging,and RevisionHistoryChangesfromRevisionA (December2014)to RevisionBPage AddedGDA, (September2011)to RevisionAPage AddedPin Configurationand Functionssection,HandlingRatingtable,Fea tureDescriptionsection,DeviceFunctionalM odes,Applicationand Implementationsection,PowerSupplyRecomme ndationssection,Layoutsection,Deviceand DocumentationSupportsection,andMechanica l,Packaging,and SEPTEMBER2011 REVISEDNOVEMBER2016 ProductFolderLinks.

4 UCC28063 SubmitDocumentationFeedbackCopyright 2011 2016,TexasInstrumentsIncorporated5 Description(Continued)Expandedsystemleve lprotectionsfeatureinputbrownoutand dropoutrecovery,outputover-voltage,open- loop,overload,soft-start,phase-faildetec tion,and additionalFailSafeover-voltageprotection (OVP)featureprotectsagainstshortsto an intermediatevoltagethat,if undetected,couldleadto resultsin rapid,yet smootherresponseto line and load Pin Configurationand FunctionsD Package16-PinSOICTop ViewPin and ChannelB GateDriveOutputGDB11 OHVSEN8 IHighVoltageOutputSensePHB4 IPhase-BEnable/DisablePWMCNTL9 OPWM-ControlOutputTSET3 ITimingSetVCC12-BiasSupplyInputVINAC7 IInputAC VoltageSenseVREF15 OVoltageReferenceOutputVSENSE2 IOutputDC VoltageSenseZCDA16 IZeroCurrentDetectionInputsZCDB1I4 UCC28063 SLUSAO7B SEPTEMBER2011.

5 UCC28063 SubmitDocumentationFeedbackCopyright 2011 2016,TexasInstrumentsIncorporated(1)Stre ssesbeyondthoselistedunderAbsoluteMaximu mRatingsmay causepermanentdamageto the stressratingsonly and functionaloperationof the deviceat theseor any otherconditionbeyondthoseincludedunderRe commendedOperatingConditionsis not absolute-maximum-ratedconditionsfor extendedperiodsof time may affectdevicereliability.(2)Voltageon VCCis exceedthe continuousabsolutemaximuminputvoltagerat ingif the sourceis currentlimitedbelowthe absolutemaximumcontinuousVCCinputcurrent level.(3)In normaluse, COMPis connectedto capacitorsand resistorsand is internallylimitedin voltageswing.

6 (4)In normaluse, VINAC,VSENSE,and HVSENare connectedto high-valueresistorsand are internallylimitedin recommendedfor extendeduse, VINAC,VSENSE,and HVSENcan surviveinputcurrentsas high as -10mAfromnegativevoltagesources,and inputcurrentsas high as + (5)In normaluse, CS is connectedto a seriesresistorto limit thesesituations,negativevoltageon CS may exceedthe continuousabsolutemaximumrating.(6)No GDAor GDBcurrentlimitingis requiredwhendrivinga ,a smallseriesresistormay be requiredtodampresonantringingdue to (1)All voltagesare with respectto GND, 40 C < TJ= TA< 125 C, currentsare positiveinto and negativeout of the specifiedterminal, (2) (3), PHB,HVSEN(4), VINAC(4), VSENSE(4) ,ZCDB (5) ,GDB(6) + ,ZCDB 5 PeakinputcurrentCS 30 OutputcurrentVREF 10 ContinuousgatecurrentGDA,GDB(6) 25 TJJunctionTemperatureOperating 40125 CStorage 65150 TSOLLeadTemperatureSoldering,10s260 TstgStoragetemperature 40125(1)

7 JEDEC documentJEP155statesthat 500-VHBM allowssafe manufacturingwith a standardESDcontrolprocess.(2)JEDEC documentJEP157statesthat 250-VCDM allowssafe manufacturingwith a (ESD)ElectrostaticdischargeHumanbodymode l(HBM),per ANSI/ESDA/JEDECJS-001(1) 2000 VCharged-devicemodel(CDM),per JEDEC specificationJESD22-C101(2) SEPTEMBER2011 REVISEDNOVEMBER2016 ProductFolderLinks:UCC28063 SubmitDocumentationFeedbackCopyright 2011 2016, voltagesare with respectto GND, 40 C < TJ= TA< 125 C, currentsare positiveinto and negativeout of the specifiedterminal, low-impedancesource1421 VVCC inputcurrentfroma high-impedancesource818mAVREF load current0 2 VINAC inputvoltage06 VZCDA,ZCDB seriesresistor2080k TSET resistorto (1)For moreinformationabouttraditionaland new thermalmetrics,see theSemiconductorand IC PackageThermalMetricsapplicationreport(S PRA953).

8 (2)The junction-to-ambientthermalresistanceunde rnaturalconvectionis obtainedin a simulationon a JEDEC-standard,high-Kboard,asspecifiedin JESD51-7,in an environmentdescribedin JESD51-2a.(3)The junction-to-case(top)thermalresistanceis obtainedby simulatinga cold platetest on the packagetop. No specificJEDEC-standardtest exists,but a closedescriptioncan be foundin the ANSISEMI standardG30-88.(4)The junction-to-boardthermalresistanceis obtainedby simulatingin an environmentwith a ring cold platefixtureto controlthe PCBtemperature,as describedin JESD51-8.(5)The junction-to-topcharacterizationparameter , JT, estimatesthe junctiontemperatureof a devicein a real systemand is extractedfromthe simulationdatafor obtainingR JA, usinga proceduredescribedin JESD51-2a(sections6 and 7).

9 (6)The junction-to-boardcharacterizationparamet er, JB, estimatesthe junctiontemperatureof a devicein a real systemand is extractedfromthe simulationdatafor obtainingR JA, usinga proceduredescribedin JESD51-2a(sections6 and 7). (1)UCC28063 UNITSOIC(D)16 PINSR JAJunction-to-ambientthermalresistance(2 ) C/WR JC(top)Junction-to-case(top)thermalresis tance(3) JBJunction-to-boardthermalresistance(4) JTJunction-to-topcharacterizationparamet er(5) JBJunction-to-boardcharacterizationparam eter(6) (1)ExcessiveVCCinputvoltageand currentwill damagethe clampwill not protectthe devicefroman unregulatedbias an unregulatedbias supplyis used,a series-connectedFixedPositive-VoltageReg ulatorsuchas the UA78L15 Ais the AbsoluteMaximumRatingstablefor the limitson VCCvoltage,current,and VCC= 16 V, AGND= PGND= 0 V, VINAC= 3 V, VSENSE= 6 V, HVSEN= 3 V, PHB= 5 V, RTSET= 133 k , all voltagesare with respectto GND,all outputsunloaded, 40 C < TJ= TA< 125 C, and currentsare positiveinto and negativeout ofthe specifiedterminal, (1)IVCC= 10 mA222426 VIVCC(ULVO)

10 VCCcurrent,UVLOVCC= priorto turn-on95200 AIVCC(stby)VCCcurrent,disabledVSENSE= 0 V100200 IVCC(on)VCCcurrent,enabledVSENSE= 2 V58mAUNDERVOLTAGELOCKOUT(UVLO) ,no loadIVREF= 0 SEPTEMBER2011 :UCC28063 SubmitDocumentationFeedbackCopyright 2011 2016,TexasInstrumentsIncorporatedElectri calCharacteristics(continued)At VCC= 16 V, AGND= PGND= 0 V, VINAC= 3 V, VSENSE= 6 V, HVSEN= 3 V, PHB= 5 V, RTSET= 133 k , all voltagesare with respectto GND,all outputsunloaded, 40 C < TJ= TA< 125 C, and currentsare positiveinto and negativeout ofthe specifiedterminal, load0 mA IVREF 2 mA 1 6mVVREF changewith VCC12 V VCC 20 V210 ERRORAMPLIFIERVSENSEreg25 VSENSE inputregulationvoltageTA= 25 currentIn regulation50100150nAVENABVSENSE enablethreshold, voltage,clampedVS