nRF52810 - Nordic Semiconductor

1 nRF52810 Product / 2017-09-29 Key featuresKey features:Applications: GHz transceiver -96 dBm sensitivity in Bluetooth low energy mode Supported data rates: 1 Mbps, 2 Mbps Bluetooth low energy mode -20 to +4 dBm TX power, configurable in 4 dB steps On-chip balun (single-ended RF) mA peak current in TX (0 dBm) mA peak current in RX RSSI (1 dB resolution) ARM Cortex -M4 32-bit processor, 64 MHz 144 EEMBC CoreMark score running from flash memory A/MHz running from flash memory A/MHz running from RAM Serial wire debug (SWD) Flexible power management V supply voltage range Fully automatic LDO and DC/DC regulator system Fast wake-up using 64 MHz internal oscillator A at 3 V in System OFF mode, no RAM retention A at 3 V in System OFF mode with full 24 kB RAM retention A at 3 V in System ON mode, with full 24 kB RAM retention, wake on RTC 192 kB flash and 24 kB RAM Nordic SoftDevice ready Support for concurrent multi-protocol 12-bit, 200 ksps ADC - 8 configurable channels with programmable gain 64 level comparator Temperature sensor Up to 32 general purpose I/O pins 4-channel pulse width modulator (PWM) unit with EasyDMA Digital microphone interface (PDM)

2 3x 32-bit timer with counter mode SPI master/slave with EasyDMA I2C compatible 2-wire master/slave UART (CTS/RTS) with EasyDMA Programmable peripheral interconnect (PPI) Quadrature decoder (QDEC) AES HW encryption with EasyDMA 2x real-time counter (RTC) Single crystal operation Package variants QFN48 package, 6 x 6 mm QFN32 package, 5 x 5 mm Computer peripherals and I/O devices Mouse Keyboard Mobile HID CE remote controls Network processor Wearables Virtual reality headsets Health and medical Enterprise lighting Industrial Commercial Retail Beacons Connectivity device in multi-chip solutions4430_161 features..ii1 Revision history..92 About this document.. Document naming and status.

3 Peripheral naming and abbreviations .. Register tables .. Fields and values .. Registers .. DUMMY .. 113 Block diagram..134 Core components.. CPU .. Electrical specification .. CPU and support module configuration .. Memory .. RAM - Random access memory .. Flash - Non-volatile memory .. Memory map .. Instantiation .. NVMC Non-volatile memory controller .. Writing to flash .. Erasing a page in flash .. Writing to user information configuration registers (UICR) .. Erasing user information configuration registers (UICR) .. Erase all .. Registers .. Electrical specification .. FICR Factory information configuration registers.

4 Registers .. UICR User information configuration registers .. Registers .. EasyDMA .. EasyDMA array list .. AHB multilayer .. Debug .. DAP - Debug Access Port .. CTRL-AP - Control Access Port .. Debug interface mode .. Real-time debug .. 545 Power and clock management.. Power management unit (PMU) .. Current consumption .. Electrical specification .. POWER Power supply .. 614430_161 Regulators .. System OFF mode .. System ON mode .. Power supply supervisor .. RAM sections .. Reset .. Retained registers .. Reset behavior .. Registers .. Electrical specification .. CLOCK Clock control .. HFCLK clock controller.

5 LFCLK clock controller .. Registers .. Electrical specification .. 926 Peripherals.. Peripheral interface .. Peripheral ID .. Peripherals with shared ID .. Peripheral registers .. Bit set and clear .. Tasks .. Events .. Shortcuts .. Interrupts .. AAR Accelerated address resolver .. EasyDMA .. Resolving a resolvable address .. Use case example for chaining RADIO packet reception with address resolution using AAR . IRK data structure .. Registers .. Electrical specification .. BPROT Block protection .. Registers .. CCM AES CCM mode encryption .. Key-steam generation .. Encryption .. Decryption .. AES CCM and RADIO concurrent operation.

6 Encrypting packets on-the-fly in radio transmit mode .. Decrypting packets on-the-fly in radio receive mode .. CCM data structure .. EasyDMA and ERROR event .. Registers .. Electrical specification .. COMP Comparator .. Differential mode .. Single-ended mode .. Registers .. Electrical specification .. ECB AES electronic codebook mode encryption .. Shared resources .. EasyDMA .. 1284430_161 ECB data structure .. Registers .. Electrical specification .. EGU Event generator unit .. Registers .. Electrical specification .. GPIO General purpose input/output .. Pin configuration .. Registers .. Electrical specification.

7 GPIOTE GPIO tasks and events .. Pin events and tasks .. Port event .. Tasks and events pin configuration .. Registers .. Electrical specification .. PDM Pulse density modulation interface .. Master clock generator .. Module operation .. Decimation filter .. EasyDMA .. Hardware example .. Pin configuration .. Registers .. Electrical specification .. PPI Programmable peripheral interconnect .. Pre-programmed channels .. Registers .. PWM Pulse width modulation .. Wave counter .. Decoder with EasyDMA .. Limitations .. Pin configuration .. Registers .. Electrical specification .. QDEC Quadrature decoder.

8 Sampling and decoding .. LED output .. Debounce filters .. Accumulators .. Output/input pins .. Pin configuration .. Registers .. Electrical specification .. RADIO GHz radio .. EasyDMA .. Packet configuration .. Maximum packet length .. Address configuration .. Data whitening .. CRC .. Radio states .. Transmit sequence .. Receive sequence .. 2914430_161 Received signal strength indicator (RSSI) .. Interframe spacing .. Device address match .. Bit counter .. Registers .. Electrical specification .. RNG Random number generator .. Bias correction .. Speed .. Registers .. Electrical specification .. RTC Real-time counter.

9 Clock source .. Resolution versus overflow and the PRESCALER .. COUNTER register .. Overflow features .. TICK event .. Event control feature .. Compare feature .. TASK and EVENT jitter/delay .. Reading the COUNTER register .. Registers .. Electrical specification .. SAADC Successive approximation analog-to-digital converter .. Shared resources .. Overview .. Digital output .. Analog inputs and channels .. Operation modes .. EasyDMA .. Resistor ladder .. Reference .. Acquisition time .. Limits event monitoring .. Registers .. Electrical specification .. Performance factors .. SPIM Serial peripheral interface master with EasyDMA.

10 SPI master transaction sequence .. Master mode pin configuration .. EasyDMA .. Low power .. Registers .. Electrical specification .. SPIS Serial peripheral interface slave with EasyDMA .. Shared resources .. EasyDMA .. SPI slave operation .. Pin configuration .. Registers .. Electrical specification .. SWI Software interrupts .. Registers .. TEMP Temperature sensor .. 3974430_161 Registers .. Electrical specification .. TIMER Timer/counter .. Capture .. Compare .. Task delays .. Task priority .. Registers .. TWIM I2C compatible two-wire interface master with EasyDMA .. EasyDMA .. Master write sequence.