OPT9221 Time-of-Flight Controller - TI.com

1 Depth EngineTiming CoordinatorPLLLVDS ReceiverDe-SerializerDDR2 ControllerI2C Master, Slave ControllerOutput Interface ModuleData, ClockDVP, SSIVD_INGPOsSlave I2 CFlow ControlMaster I2 CConfigurationTIC_MS (4 Lines) OPT9221 Temperature CompensationSYSCLK_INVD, CLK, Reset, I2C ControlTemperature CompensationFrom IlluminationTo OPT8241 From OPT8241To DDRTo Optional EEPROMTo Optional Temperature SensorTo HostIOVDD V, V, VVCCINT VVCCD_PLL VVCCA VProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunityAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand JUNE2015 REVISEDJUNE2015 OPT9221 time -of-FlightController11 Features1 QVGA3D ToF Controller :Up to 120 FPS DepthData: 12-BitPhase Up to 12-BitAmplitude Up to 4-BitAmbient SaturationDetection ChipsetInterface: Compatiblewith TI ToF Sensor(OPT8241) Output(CMOS,8-LaneData,8 ControlSignals,and Clock): DigitalVideoProtocol(DVP)-Compatible: Data,VD, HD, Clock SynchronousSerialInterface(SSI)-Compatib le DepthEngine: PixelBinning Regionof Interest(ROI) De-Aliasing Non-linearityCorrection TemperatureCompensation HighDynamicRangeOperation SpatialFilter TimingCoordinator: SensorControl Masterand SlaveSyncOperation I2C SlaveInterface , , Package:256-Pin,9-mm 9-mmNFBGA OperatingTemperature:0 C to 85 C2 Applications 3D Imaging.

2 Locationand ProximitySensing 3D Scanningand 3D MachineVision Securityand Surveillance GestureControls3 DescriptionThetime-of-flightcontroller(T FC)is a high-performance,3 Dtime-of- flight (ToF)sensorcompaniondevic ethat computesthe depthdatafromthe outputvia aprogrammablecomplementarymetal-oxide-se miconductor(CMOS) additionto depthdata,the TFCprovidesauxiliaryinformationconsistin gof amplitude,ambient,andflagsfor be usedtoimplementfiltersandmasksandto dynamicallycontrolthe systemconfigurationfor the TFCsupportsa widerangeof binningand ROIoptionsthat helpoptimizethe datathroughputthatmustbe 9-mm 9-mmNFBGA packageenablessmallform-factor,3D, ToF systemsthat can be embeddedinto a varietyof end (1)PARTNUMBERPACKAGEBODYSIZE(NOM) OPT9221 NFBGA(256) (1) For all availablepackages,see the orderableaddendumatthe end of the JUNE2015 : OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporatedTableof Contents1 Pin Configurationand Applicationand Deviceand Mechanical,Packaging,and RevisionHistoryChangesfromOriginal(June2 015)

3 To RevisionAPage ChangedfromProductPreviewto 11 12 13 14 15 16 ABCDEFGHJKLMNPRTVCCIO8 GPO_3 GPO_2 GPO_0 TIC_DATA_7 RSVDVD_INRSVD_INRSVD_INVD_QDHD_QDVD_SFVD _FRSENSOR_DEMOD_CLKVSYNC_OUTVCCIO7 SLEEPGNDGPO_1 RSVDRSVDRSVDTIC_DATA_4 RSVD_INRSVD_INRSVDRSVDRSVDRSVDSENSOR_CLK GNDILLUM_FBTIC_DATA_1/ASDORESETZRSVDVCCI O8 GNDRSVDVCCIO8I2C_MAS_SDAI2C_SDA_SENSORVC CIO7 RSVDGNDVCCIO7 RSVDILLUM_SW_2 ILLUM_SW_1 DEBUGTIC_CSOZRSVDVCCD_PLL3 RSVDRSVDGNDI2C_MAS_SCLI2C_SCL_SENSORGNDR SVDRSVDVCCD_PLL2 SENSOR_RSTZRSVDRSVDSYSCLK_INGNDVCCIO1 GNDGNDA3 TIC_DATA_6 TIC_DATA_5 TIC_DATA_2 GPI_1 RSVDRSVDGNDA2 GNDVCCIO6 ILLUM_MOD_FBCOMP_MOD_FBI2C_SLV_SCLI2C_SL V_SDARSVDTIC_STATUSZVCCA3 GNDVCCINTTIC_DATA_3 GPI_0 GNDVCCINTVCCA2 ILLUM_REFRSVDIO_MOD_REFCOMP_MOD_REFRSVDI NT_OUTVCCIO1 GNDINT_PMICVCCINTVCCINTVCCINTVCCINTVCCIN TRSVDBOOT_2 GNDVCCIO6 RSVDTIC_INIT_DONETIC_CLKTIC_DATA_0 TIC_CTIC_ITIC_CONFIGZVCCINTGNDGNDGNDGNDV CCINTBOOT_1 BOOT_0 TIC_CONF_ JUNE2015 REVISEDJUNE2015 ProductFolderLinks: OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporated5 Pin Configurationand FunctionsZVMP ackage256-BallNFBGATop ViewPin FunctionsPINI/OI/OSTANDARDI/O V Bootconfigurationpin 0.

4 Tie to VCCor to V Bootconfigurationpin 1. Tie to VCCor to V Bootconfigurationpin 2. Tie to VCCor to JUNE2015 : OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporatedPin Functions(continued)PINI/OI/OSTANDARDI/O clkCAP_BIT_CLKPM15 InputLVDSVCCIO5 Sensordatabit clkCAP_DATA_DIFF_0MN16 InputLVDSVCCIO5 Sensordifferentialdatach 0 CAP_DATA_DIFF_0PN15 InputLVDSVCCIO5 Sensordifferentialdatach 0 CAP_DATA_DIFF_1MK16 InputLVDSVCCIO5 Sensordifferentialdatach 1 CAP_DATA_DIFF_1PK15 InputLVDSVCCIO5 Sensordifferentialdatach VVCCIO6 Feedbacksignalfromthe VVCCIO6 Referencemodulationsignalfor JUNE2015 REVISEDJUNE2015 ProductFolderLinks: OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporatedPin Functions(continued)PINI/OI/OSTANDARDI/O selectDDR2_DM_0P3 OutputSSTL-18 ClassIVCCIO3 DDRdatamask0 DDR2_DM_1M8 OutputSSTL-18 ClassIVCCIO3 DDRdatamask1 DDR2_DQ_0L7 BidirSSTL-18 ClassIVCCIO3 DDRdata15 DDR2_DQ_1N5 BidirSSTL-18 ClassIVCCIO3 DDRdata14 DDR2_DQ_2R6 BidirSSTL-18 ClassIVCCIO3 DDRdata13 DDR2_DQ_3N6 BidirSSTL-18 ClassIVCCIO3 DDRdata12 DDR2_DQ_4R5 BidirSSTL-18 ClassIVCCIO3 DDRdata11 DDR2_DQ_5R7 BidirSSTL-18 ClassIVCCIO3 DDRdata10 DDR2_DQ_6R3 BidirSSTL-18 ClassIVCCIO3 DDRdata9 DDR2_DQ_7L8 BidirSSTL-18 ClassIVCCIO3 DDRdata8 DDR2_DQ_8R12 BidirSSTL-18 ClassIVCCIO4 DDRdata7 DDR2_DQ_9N9 BidirSSTL-18 ClassIVCCIO4 DDRdata6 DDR2_DQ_10R11 BidirSSTL-18 ClassIVCCIO4 DDRdata5 DDR2_DQ_11R10 BidirSSTL-18 ClassIVCCIO4 DDRdata4 DDR2_DQ_12P8 BidirSSTL-18 ClassIVCCIO3 DDRdata3 DDR2_DQ_13T14 BidirSSTL-18 ClassIVCCIO4 DDRdata2 DDR2_DQ_14N8 BidirSSTL-18 ClassIVCCIO3 DDRdata1 DDR2_DQ_15T13 BidirSSTL-18 ClassIVCCIO4 DDRdata0

5 DDR2_DQS_0M7 OutputSSTL-18 ClassIVCCIO3 DDRdatastrobeDDR2_DQS_1T7 OutputSSTL-18 ClassIVCCIO3 DDRdatastrobeDDR2_ODT_0T15 BidirSSTL-18 ClassIVCCIO4 DDRon die terminationDDR2_RASZT12 OutputSSTL-18 ClassIVCCIO4 DDRRASDDR2_REF_0T3 InputAnalog DDRreference,tie to VDDR2_REF_1P6 InputAnalog DDRreference,tie to VDDR2_REF_2P11 InputAnalog DDRreference,tie to VDDR2_REF_3N12 InputAnalog DDRreference,tie to VVCCIO1TI 10 k . VVCCIO2 Marksthe end of a frame6 OPT9221 SBAS703A JUNE2015 : OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporatedPin Functions(continued)PINI/OI/OSTANDARDI/O DigitalgroundGNDB15 Power DigitalgroundGNDC5 Power DigitalgroundGNDC12 Power DigitalgroundGNDD7 Power DigitalgroundGNDD10 Power DigitalgroundGNDE2 Power DigitalgroundGNDE4 Power DigitalgroundGNDE13 Power DigitalgroundGNDF6 Power DigitalgroundGNDF10 Power DigitalgroundGNDG4 Power DigitalgroundGNDG13 Power DigitalgroundGNDH7 Power DigitalgroundGNDH8 Power DigitalgroundGNDH9 Power DigitalgroundGNDH10 Power DigitalgroundGNDH15 Power DigitalgroundGNDH16 Power DigitalgroundGNDJ7 Power DigitalgroundGNDJ8 Power DigitalgroundGNDJ9 Power DigitalgroundGNDJ10 Power DigitalgroundGNDJ11 Power DigitalgroundGNDK4 Power DigitalgroundGNDK8 Power DigitalgroundGNDK13 Power DigitalgroundGNDM4 Power DigitalgroundGNDM13 Power DigitalgroundGNDN7 Power DigitalgroundGNDN10 Power DigitalgroundGNDP5 Power DigitalgroundGNDP12 Power DigitalgroundGNDR2 Power

6 DigitalgroundGNDR15 Power DigitalgroundGNDA1M5 Power AnaloggroundGNDA2E12 Power AnaloggroundGNDA3E5 Power AnaloggroundGNDA4M12 Power VVCCIO8 VVCCIO2 Indicatesthe row boundaryor JUNE2015 REVISEDJUNE2015 ProductFolderLinks: OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporatedPin Functions(continued)PINI/OI/OSTANDARDI/O VVCCIO6 Comparatoroutputfeedbackto the VVCCIO1 Interruptto VVCCIO6 Referencemodulationsignalfromthe TFCfor measuringTFCI/O VVCCIO8I2C VVCCIO8I2C VVCCIO7 DedicatedI2C for sensor- VVCCIO7 DedicatedI2C for sensor- VVCCIO1I2C VVCCIO1I2C VVCCIO2 Indicatesthe validityof the VVCCIO2 Outputdatabit VVCCIO2 Outputdatabit VVCCIO2 Outputdatabit VVCCIO2 Outputdatabit VVCCIO2 Outputdatabit VVCCIO2 Outputdatabit VVCCIO2 Outputdatabit VVCCIO2 Outputdatabit VVCCIO2 Usedto indicatefailurein flow VVCCIO2 Indicatesthe type of dataon the VVCCIO2 Usedto achieveflow controlof the VVCCIO1 Globalresetfor the JUNE2015.

7 OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporatedPin Functions(continued)PINI/OI/OSTANDARDI/O VVCCIO8 Tie to VVCCIO7 Tie to VVCCIO8 Tie to VVCCIO7 Tie to GNDRSVD_INL14 InputAnalogVCCIO5 Tie to VRSVD_INL15 InputAnalogVCCIO5 Tie to VVCCIO2 Tie to VVCCIO3 Tie to VVCCIO4 Tie to VVCCIO3 Tie to VVCCIO4 Tie to VVCCIO7 Demodclockfor VVCCIO1 Putsthe TFCin V 10 k VVCCIO1If high,TFCreleasesthe controlof ,tie to VVCCIO1 Usedto startfirmwareload operationTIC_CONF_DONEH14 OutputOpenDrainVCCIO6 Usedto indicateend of firmwareload VVCCIO1In masterserialbootmode,Usedby TFCto loadfirmwarefromEEPROMas chip VVCCIO1 Configurationdatapin JUNE2015 REVISEDJUNE2015 ProductFolderLinks: OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporatedPin Functions(continued)PINI/OI/OSTANDARDI/O VVCCIO1 Usedas outputin masterserialbootmodetocommunicateto firmwareEEPROMas data-outpin.

8 Inputin VVCCIO8 Usedonly in to VVCCIO8 Usedonly in to VVCCIO8 Usedonly in to VVCCIO8 Usedonly in to VVCCIO8 Usedonly in to VVCCIO8 Usedonly in to V 10 k to indicateend of V V 10 k to indicatestatusof firmwareload operationVCCA1L5 Power JUNE2015 : OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporatedPin Functions(continued)PINI/OI/OSTANDARDI/O VVCCIO2 Indicatesthe VVCCIO7 SensorSyncinput(1)Stressesbeyondthoselis tedunderAbsoluteMaximumRatingsmay causepermanentdamageto the stressratingsonly,whichdo not implyfunctionaloperationof the deviceat theseor any otherconditionsbeyondthoseindicatedunder RecommendedOperatingConditions. Exposureto absolute-maximum-ratedconditionsfor extendedperiodsmay affectdevicereliability.

9 (2)All voltagesare with respectto the GND= 0 V and all voltagesrelatedto ground(unlessotherwisenoted)(1) (2)MINMAXUNITC orevoltageVCCINT voltageVCCIO digitalsupplyVCCD_PLL AnalogsupplyVCCA inputpins,VI ,IOUT 2540mAOperatingjunctiontemperature,TJ 40125 CStoragetemperaturerange,Tstg 65150 C(1)JEDEC documentJEP155statesthat 500-VHBM allowssafe manufacturingwith a standardESDcontrolprocess.(2)JEDEC documentJEP157statesthat 250-VCDM allowssafe manufacturingwith a (ESD)ElectrostaticdischargeHumanbodymode l(HBM),per ANSI/ESDA/JEDECJS-001,allpins(1)2000 VChargeddevicemodel(CDM),per JEDEC specificationJESD22-C101,all pins(2) JUNE2015 REVISEDJUNE2015 ProductFolderLinks: OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporated(1)VCCI Ois the GND= 0 V and all voltagesrelatedto ground(unlessotherwisenoted) inputpins (1)+ CtRAMPP ower-supplyramptime503000 s(1)For moreinformationabouttraditionaland new thermalmetrics,see theIC PackageThermalMetricsapplicationreport, (1) OPT9221 UNITZVM(NFBGA)256 BALLSR C/WR JC(top)Junction-to-case(top) JUNE2015 : OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporated(1)VCCI Ois the correspondingbankvoltage.

10 (2)For, 0 < Inputvoltage< VCCIO(1) VCCIOVVOHHigh-leveloutputvoltageVCCIO leakagecurrent(2) 1010 AIOHHigh-leveloutputcurrent leakagecurrent(2) 1010 AIOHHigh-leveloutputcurrent clockSlaveI2C interfaceclockfrequency400 KHzMasterI2C interfaceclockfrequency400 KHzSensorI2C interfaceclockfrequency400 KHzPARALLELCMOSMODE(AssumingdefaultOP_CL Kpolarity)tsuDatasetuptimeDatavalidto zerocrossingof CLKOUT5nsthDatahold timeZerocrossingof CLKOUTto databecominginvalid20nsOP_CLKOP_CLKt sut suDn*t ht hOP_DATAnOP_DATAnOutput dataOutput dataOutput clockOutput JUNE2015 REVISEDJUNE2015 ProductFolderLinks: OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporatedFigure1 . TimingDiagramDepth EngineTiming CoordinatorPLLLVDS ReceiverDe-SerializerDDR2 ControllerI2C Master, Slave ControllerOutput Interface ModuleData, ClockDVP, SSIVD_INGPOsSlave I2 CFlow ControlMaster I2 CConfigurationTIC_MS (4 Lines) OPT9221 Temperature CompensationSYSCLK_INVD, CLK, Reset, I2C ControlTemperature CompensationFrom IlluminationTo OPT8241 From OPT8241To DDRTo Optional EEPROMTo Optional Temperature SensorTo HostIOVDD V, V, VVCCINT VVCCD_PLL VVCCA V14 OPT9221 SBAS703A JUNE2015 : OPT9221 SubmitDocumentationFeedbackCopyright 2015,TexasInstrumentsIncorporated7 TFChas the followingblocks.