P-Channel 2.5 V (G-S) MOSFET

1 vishay SiliconixSi2301 BDSD ocument Number: 72066S11-2044-Rev. F, document is subject to change without PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT V (G-S) MOSFETFEATURES Halogen-free According to IEC 61249-2-21 Definition TrenchFET Power MOSFET 100 % Rg Te s t e d Compliant to RoHS Directive 2002/95/ECNotes: a. Pulse width limited by maximum junction Surface mounted on FR4 board, t 5 Surface mounted on FR4 board.* Pb containing terminations are not RoHS compliant, exemptions may apply. PRODUCT SUMMARY VDS (V)RDS(on) ( )ID (A)b- at VGS = - V - at VGS = - V - Information:Si2301 BDS-T1-E3 (Lead (Pb)-free)Si2301 BDS-T1-GE3 (Lead (Pb)-free and Halogen-free)GTO-236(SOT-23)SDTop View231Si2301 BDS (L1)** Marking CodeABSOLUTE MAXIMUM RATINGS (TA = 25 C, unless otherwise noted)Parameter Symbol 5 s Steady State Unit Drain-Source Voltage VDS- 20 VGate-Source Voltage VGS 8 Continuous Drain Current (TJ = 150 C)bTA = 25 CID- = 70 C- Drain CurrentaIDM- 10 Continuous Source Current (Diode Conduction)

2 BIS- DissipationbTA = 25 = 70 Junction and Storage Temperature Range TJ, Tstg- 55 to 150 CTHERMAL RESISTANCE RATINGSP arameter Symbol TypicalMaximumUnit Maximum Junction-to-AmbientbRthJA120145 C/WMaximum Number: 72066S11-2044-Rev. F, 17-Oct-11 vishay SiliconixSi2301 BDSThis document is subject to change without PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT :a.

3 Pulse test: pulse width 300 s duty cycle 2 %.b. For DESIGN AID ONLY, not subject to production Switching time is essentially independent of operating beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operationof the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximumrating conditions for extended periods may affect device (TJ = 25 C, unless otherwise noted)Parameter Symbol Test Conditions LimitsUnit Breakdown VoltageVDSVGS = 0 V, ID = - 250 A - 20 VGate Threshold VoltageVGS(th)

4 VDS = VGS, ID = - 250 A - LeakageIGSSVDS = 0 V, VGS = 8 V 100 nAZero Gate Voltage Drain CurrentIDSSVDS = - 20 V, VGS = 0 V - 1 AVDS = - 20 V, VGS = 0 V, TJ = 55 C - 10On-State Drain CurrentaID(on) VDS - 5 V, VGS = - V - 6 AVDS - 5 V, VGS = - V - 3 Drain-Source On-State ResistanceaRDS(on) VGS - V, ID = - A VGS = - V, ID = - 2 A Transconductanceagfs VDS = - 5 V, ID = - A Forward VoltageVSDIS = - A, VGS = 0 V - Gate ChargeQgVDS = - 6 V, VGS = - VID - A ResistanceRgf = 1 MHz2 8 16 Input CapacitanceCissVDS = - 6 V, VGS = 0 V, f = 1 MHz375pFOutput CapacitanceCoss95 Reverse Transfer CapacitanceCrss65 SwitchingcTu r n - O n T i m etd(on) VDD = - 6 V, RL = 6 ID - 1 A, VGEN = - VRg = 6 2030nstr4060 Turn-Off Timetd(off) 3045tf2030 Document Number: 72066S11-2044-Rev.

5 F, SiliconixSi2301 BDSThis document is subject to change without PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT CHARACTERISTICS (25 C, unless otherwise noted)Output CharacteristicsOn-Resistance vs. Drain CurrentGate Charge0246810012345 VDS - Drain-to-Source Voltage (V)- Drain Current (A)IDVGS = 5 thru V2 V1 (on)ID - Drain Current (A)VGS = VVGS = V012345012345- Gate-to-Source Voltage (V)Qg - Total Gate Charge (nC)VGSVDS = 10 VID = ATransfer CharacteristicsCapacitanceOn-Resistance vs. Junction - Gate-to-Source Voltage (V)- Drain Current (A)IDTC = - 55 C 125 C25 C0200400600800048121620 VDS - Drain-to-Source Voltage (V)C - Capacitance (pF)CrssCossCissRDS(on) - On-Resistance (Normalized) 50- 250255075100125150 VGS = VID = ATJ - Junction Temperature ( C) Number: 72066S11-2044-Rev.

6 F, 17-Oct-11 vishay SiliconixSi2301 BDSThis document is subject to change without PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT CHARACTERISTICS (25 C, unless otherwise noted)Source-Drain Diode Forward VoltageThreshold Voltage- Source Current (A)ISTJ = 150 CVSD - Source-to-Drain Voltage (V) = 25 C1 Variance (V)VGS(th)- 50- 250255075100125150TJ - Temperature ( C)ID = 250 AOn-Resistance vs. Gate-to-Source VoltageSingle Pulse (on)VGS - Gate-to-Source Voltage (V)ID = ATime (s)Power (W)TA = 25 Operating AreaSquare Wave Pulse Duration (s)VDS - Drain-to-Source Voltage (V) Drain Current (A) s100 s 1 ms10 ms100 msTA = 25 CSingle PulseDC, 100 s, 10 s, 1 sRDS(on)*Limited by* VGS minimum VGS at which RDS(on)is specifiedDocument Number: 72066S11-2044-Rev.

7 F, SiliconixSi2301 BDSThis document is subject to change without PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT CHARACTERISTICS (25 C, unless otherwise noted) vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for SiliconTechnology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, andreliability data, see Thermal Transient Impedance, Junction-to-AmbientNormalized Effective TransientThermal PulseDuty Cycle = Duty Cycle, D =2.

8 Per Unit Base = RthJA = C/W3. TJM - TA = PDMZthJA(t)t1t2t1t2 Notes:4. Surface MountedPDM100 Square Wave Pulse Duration (s) vishay SiliconixPackage InformationDocument Number: (TO-236): 3-LEADbEE1132 See1DA2AA1 CSeating "CCL1 LqGauge PlaneSeating mmDimMILLIMETERS INCHES Min Max Min Max Refq3 8 3 8 ECN: S-03946-Rev. K, 09-Jul-01 DWG: 5479AN807 vishay SiliconixDocument Number: LITTLE FOOTR SOT-23 Power MOSFETsWharton McDanielSurface-mounted LITTLE FOOT power mosfets use integratedcircuit and small-signal packages which have been been modifiedto provide the heat transfer capabilities required by power materials and design, molding compounds, and dieattach materials have been changed, while the footprint of thepackages remains the Application Note 826, Recommended Minimum PadPatterns With Outline Drawing Access for vishay SiliconixMOSFETs, ( ), for the basisof the pad design for a LITTLE FOOT SOT-23 power MOSFET footprint.

9 In converting this footprint to the pad set for a powerdevice, designers must make two connections: an electricalconnection and a thermal connection, to draw heat away from electrical connections for the SOT-23 are very simple. Pin 1 isthe gate, pin 2 is the source, and pin 3 is the drain. As in the otherLITTLE FOOT packages, the drain pin serves the additionalfunction of providing the thermal connection from the package tothe PC board. The total cross section of a copper trace connectedto the drain may be adequate to carry the current required for theapplication, but it may be inadequate thermally. Also, heat spreadsin a circular fashion from the heat source. In this case the drain pinis the heat source when looking at heat spread on the PC 1 shows the footprint with copper spreading for the SOT-23package.

10 This pattern shows the starting point for utilizing theboard area available for the heat spreading copper. To create thispattern, a plane of copper overlies the drain pin and providesplanar copper to draw heat from the drain lead and start theprocess of spreading the heat so it can be dissipated into theambient air. This pattern uses all the available area underneath thebody for this With Copper surface-mounted packages are small, and reflow solderingis the most common way in which these are affixed to the PCboard, thermal connections from the planar copper to the padshave not been used. Even if additional planar copper area is used,there should be no problems in the soldering process.