Power MOSFET - Vishay

1 IRFR9014, IRFU9014, SiHFR9014, Siliconix S16-0015-Rev. E, 18-Jan-161 Document Number: 91277 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT MOSFETFEATURES Dynamic dV/dt rating Repetitive avalanche rated Surface mount (IRFR9014, SiHFR9014) Straight lead (IRFU9014, SiHFU9014) Available in tape and reel P-channel Fast switching Material categorization: for definitions of compliance please see generation Power mosfets from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The DPAK is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU, SiHFU series) is for through-hole mounting applications.

2 Power dissipation levels up to W are possible in typical surface mount See device Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).b. VDD = - 25 V, starting TJ = 25 C, L = mH, Rg = 25 , IAS = - A (see fig. 12).c. ISD - A, dI/dt 90 A/ s, VDD VDS, TJ 150 mm from When mounted on 1" square PCB (FR-4 or G-10 material).PRODUCT SUMMARYVDS (V)-60 RDS(on) ( )VGS = -10 V max. (nC)12 Qgs (nC) (nC) MOSFETDPAK(TO-252)IPAK(TO-251)GDSSDGDA vailableORDERING INFORMATIONP ackageDPAK (TO-252)DPAK (TO-252)DPAK (TO-252)IPAK (TO-251)Lead (Pb)-free and Halogen-freeSiHFR9014-GE3 SiHFR9014 TRL-GE3 aSiHFR9014TR-GE3 aSiHFU9014-GE3 Lead (Pb)-freeIRFR9014 PbF IRFR9014 TRLPbF aIRFR9014 TRPbF aIRFU9014 PbFABSOLUTE MAXIMUM RATINGS (TC = 25 C, unless otherwise noted)PARAMETER SYMBOLLIMITUNITD rain-Source VoltageVDS-60V Gate-Source VoltageVGS 20 Continuous Drain CurrentVGS at VTC = 25 C = 100 C Drain Current aIDM -20 Linear Derating C Linear Derating Factor (PCB mount)

3 Pulse Avalanche Energy bEAS 140mJ Repetitive Avalanche Current aIAR Repetitive Avalanche Energy Maximum Power DissipationTC = 25 C PD25W Maximum Power Dissipation (PCB mount) eTA = 25 C Diode Recovery dV/dt cdV/dt Operating Junction and Storage Temperature RangeTJ, Tstg-55 to +150 C Soldering Recommendations (Peak temperature) dfor 10 s260 IRFR9014, IRFU9014, SiHFR9014, Siliconix S16-0015-Rev. E, 18-Jan-162 Document Number: 91277 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT When mounted on 1" square PCB (FR-4 or G-10 material). Notesa. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).b. Pulse width 300 s; duty cycle 2 %.THERMAL RESISTANCE RATINGSPARAMETER Junction-to-AmbientRthJA--110 C/WMaximum Junction-to-Ambient (PCB mount) aRthJA--50 Maximum Junction-to-Case (Drain) (TJ = 25 C, unless otherwise noted)PARAMETER SYMBOLTEST CONDITIONS Breakdown VoltageVDS VGS = 0 V, ID = - 250 A -60--V VDS Temperature Coefficient VDS/TJ Reference to 25 C, ID = -1 mA C Gate-Source Threshold Voltage VGS(th)VDS = VGS, ID = -250 A Gate-Source Leakage IGSS VGS = 20 V-- 100nA Zero Gate Voltage Drain Current IDSS VDS = -60 V, VGS = 0 V ---100 A VDS = -48 V, VGS = 0 V, TJ = 125 C ---500 Drain-Source On-State Resistance RDS(on)

4 VGS = -10 VID = A Forward Transconductance gfsVDS = -25 V, ID = A DynamicInput CapacitanceCiss VGS = 0 V, VDS = - 25 V, f = MHz, see fig. 5-270-pFOutput Capacitance Coss -170-Reverse Transfer Capacitance Crss -31-Total Gate Charge Qg VGS = - 10 V ID = A, VDS = -48 V, see fig. 6 and 13 b--12nC Gate-Source Charge Qgs ChargeQgd Delay Time td(on) VDD = -30 V, ID = A, Rg = 24 , RD = , see fig. 10 b-11-nsRise Timetr -63-Turn-Off Delay Time td(off) Time tf -31-Internal Drain Inductance LD Between lead, 6 mm ( ") from package and center of die contact c Internal Source Body Diode CharacteristicsContinuous Source-Drain Diode Current ISMOSFET symbolshowing the integral reverse p - n junction Diode Forward Current aISM---20 Body Diode VoltageVSDTJ = 25 C, IS = A, VGS = 0 V Diode Reverse Recovery TimetrrTJ = 25 C, IF = A, dI/dt = 100 A/ s b-80160nsBody Diode Reverse Recovery CForward Turn-On TimetonIntrinsic turn-on time is negligible (turn-on is dominated by LS and LD)DSGSDGIRFR9014, IRFU9014, SiHFR9014, Siliconix S16-0015-Rev.

5 E, 18-Jan-163 Document Number: 91277 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT CHARACTERISTICS (25 C, unless otherwise noted) Fig. 1 - Typical Output Characteristics, TC = 25 C Fig. 2 - Typical Output Characteristics, TC = 150 C Fig. 3 - Typical Transfer Characteristics Fig. 4 - Normalized On-Resistance vs. TemperatureIRFR9014, IRFU9014, SiHFR9014, Siliconix S16-0015-Rev. E, 18-Jan-164 Document Number: 91277 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating AreaIRFR9014, IRFU9014, SiHFR9014, Siliconix S16-0015-Rev.

6 E, 18-Jan-165 Document Number: 91277 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10a - Switching Time Test Circuit Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-CasePulse width 1 sDuty factor % 10 V+-VDSVDDVGS10 %90 %VDStd(on)trtd(off)tfIRFR9014, IRFU9014, SiHFR9014, Siliconix S16-0015-Rev. E, 18-Jan-166 Document Number: 91277 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Fig. 13a - Basic Gate Charge Waveform Fig.

7 13b - Gate Charge Test +-VDD- 10 VVar y tp to obtainrequired IASIASVDSVDDVDStpQGSQGDQGVGC harge- 10 3 F50 k 12 VCurrent regulatorCurrent sampling resistorsSame type as +-IRFR9014, IRFU9014, SiHFR9014, Siliconix S16-0015-Rev. E, 18-Jan-167 Document Number: 91277 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Fig. 14 - For P-ChannelVishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see recoverydV/dtBody diode forward dropBody diode forwardcurrentDriver gate driveInductor currentD = +----+ ++Peak Diode Recovery dV/dt Test Circuit dV/dt controlled by Rg - device under layout considerations Low stray inductance Ground plane Low leakage inductancecurrent transformerRg Compliment N-Channel of for driverVDD ISD controlled by duty factor D NoteNotea.

8 VGS = - 5 V for logic level and - 3 V drive devicesVGS = - 10 lSD VDS waveformVDDRe-appliedvoltageRipple 5 %ISDR everserecoverycurrentPackage Siliconix Revision: 16-May-161 Document Number: 71197 For technical questions, contact: DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENTARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Case OutlineNotes Dimension L3 is for reference plane height ( mm) : T16-0236-Rev. P, 16-May-16 DWG: 5347 Document Number: : 15-Sep-081 Package InformationVishay Siliconix TO-251AA (HIGH VOLTAGE)Notes1. Dimensioning and tolerancing per ASME Dimension are shown in inches and Dimension D and E do not include mold flash. Mold flash shall not exceed mm ( ") per side. These dimensions are measured at theoutermost extremes of the plastic Thermal pad contour optional with dimensions b4, L2, E1 and Lead dimension uncontrolled in Dimension b1, b3 and c1 apply to base metal Outline conforms to JEDEC outline , b3(b, b2)c1(c)Section B - B and C - CDAc2cLead tip55(Datum A)Thermal PADE14D1 View A - AA1 AACS eatingplaneCCBB 1 2B44435L1LL33 x b23 x b3b4E2 x 10'15'0'15' 225'35'25'35' : S-82111-Rev.

9 A, 15-Sep-08 DWG: 5968 Application Note 826 Vishay Siliconix Document Number: : 21-Jan-083 APPLICATION NOTERECOMMENDED MINIMUM PADS FOR DPAK (TO-252) ( )Recommended Minimum PadsDimensions in Inches/(mm) ( ) ( ) ( ) ( ) ( ) ( )Return to IndexReturn to IndexLegal Disclaimer Revision: 08-Feb-171 Document Number: 91000 Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, Vishay ), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product.

10 To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application.