Transcription of Regulating Pulse Width Modulator datasheet - TI.com
1 BLOCK DIAGRAMUC1526 AUC2526 AUC3526 ARegulating Pulse Width ModulatorFEATURES Reduced Supply Current Oscillator Frequency to 600kHz Precision Band-Gap Reference 7 to 35V Operation Dual 200mA Source/Sink Outputs Minimum Output Cross-Conduction Double- Pulse Suppression Logic Under-Voltage Lockout Programmable Soft-Start Thermal Shutdown TTL/CMOS Compatible Logic Ports 5 Volt Operation (VIN = VC = VREF = )DESCRIPTIONThe UC1526A Series are improved-performance Pulse - Width modu-lator circuits intended for direct replacement of equivalent non- A versions in all applications. Higher frequency operation has beenenhanced by several significant improvements including: a more ac-curate oscillator with less minimum dead time, reduced circuit de-lays (particularly in current limiting), and an improved output stagewith negligible cross-conduction current.
2 Additional improvementsinclude the incorporation of a precision, band-gap reference gener-ator, reduced overall supply current, and the addition of thermalshutdown with these improvements, the UC1526A Series retains theprotective features of under-voltage lockout, soft-start, digital cur-rent limiting, double Pulse suppression logic, and adjustabledeadtime. For ease of interfacing, all digital control ports are TTLcompatible with active low volt (5V) operation is possible for logic level applications byconnecting VIN, VC and VREF to a precision 5V input supply. Consultfactory for additional OPERATING CONDITIONS (Note 3)Input Voltage.
3 +7V to +35 VCollector Supply Voltage .. + to +35 VSink/Source Load Current (each output) .. 0 to 100mAReference Load Current .. 0 to 20mAOscillator Frequency Range .. 1Hz to 600kHzOscillator Timing Resistor.. 2k to 150k Oscillator Timing Capacitor.. 400pF to 20 FAvailable Deadtime Range at 40kHz .. 1% to 50%Operating Ambient Temperature Range UC1526A.. -55 C to +125 C UC2526A.. -25 C to +85 C UC3526A.. 0 C to +70 CABSOLUTE MAXIMUM RATINGS (Note 1, 2)Input Voltage (+VIN).. +40 VCollector Supply Voltage (+VC) .. +40 VLogic Inputs .. to + Inputs .. to +VINS ource/Sink Load Current (each output) .. 200mAReference Load Current .. 50mALogic Sink Current.
4 15mAPower Dissipation at TA = +25 C (Note 2) .. 1000mWPower Dissipation at TC = +25 C (Note 2) .. 3000mWOperating Junction Temperature .. +150 CStorage Temperature Range .. -65 C to +150 CLead Temperature (soldering, 10 seconds) .. +300 CCONNECTION DIAGRAMSPACKAGE PIN FUNCTIONFUNCTIONPINN/C1+ CURRENT SENSE7+ CURRENT SENSE8 SHUTDOWN9 RTIMING10CT11RD12 SYNC13 OUTPUT A14VC15N/C16 GROUND17 OUTPUT B18+VIN19 VREF20 PLCC-20, LCC-20 (TOP VIEW) Q and L PackagesDIL-18, SOIC-18 (TOP VIEW)J or N Package, DW PackageNote 1: Values beyond which damage may 2: Consult packaging Section of Databook for thermal limitations and considerations of 3: Range over which the device is functional and parameter limits are CONDITIONSUC1526A / UC2526 AUC3526 AUNITSMINTYPMAXMINTYPMAXR eference Section (Note 4)Output VoltageTJ = +25 Regulation+VIN = 7 to 35V210215mVLoad RegulationIL = 0 to 20mA520520mVTemperature StabilityOver Operating TJ (Note 5)15501550mVTotal Output VoltageRangeOver Recommended Circuit CurrentVREF = 0V25501002550100mAUnder-Voltage LockoutRESET Output VoltageVREF = = Section (Note 6)Initial AccuracyTJ = +25 C 3 8 3 8%Voltage Stability+VIN = 7 to StabilityOver Operating TJ (Note 5)2613%Minimum FrequencyRT = 150k , CT = 20 F (Note 5)
5 11 HzMaximum FrequencyRT = 2k , CT = 470pF550650kHzSawtooth Peak Voltage+VIN = Valley Voltage+VIN = Pulse WidthTJ = 25 C, RL = to sError Amplifier Section (Note 7)Input Offset VoltageRS 2k 25210mVInput Bias Current-350-1000-350-2000nAInput Offset Current3510035200nADC Open Loop GainRL 10M 64726072dBHIGH Output VoltageVPIN 1 - VPIN 2 150mV, ISOURCE = 100 Output VoltageVPIN 2 - VPIN 1 150mV, ISINK = 100 Mode RejectionRS 2k 70947094dBSupply Voltage Rejection+VIN = 12 to 18V66806680dBPWM Comparator (Note 6)Minimum Duty CycleVCOMPENSATION = + Duty CycleVCOMPENSATION = + Ports (SYNC, SHUTDOWN, and RESET)HIGH Output VoltageISOURCE = 40 Output VoltageISINK = Input CurrentVIH = + ALOW Input CurrentVIL = + AShutdown DelayFrom Pin 8, TJ = 25 C160160nsCurrent Limit Comparator (Note 8)Sense VoltageRS 50 9010011080100120mVInput Bias Current-3-10-3-10 AShutdown DelayFrom pin 7, 100mV Overdrive, TJ = 25 C260260ns+VIN = 15V, and over operating ambient temperature, unless otherwise specified TA = CHARACTERISTICS:Note 4: IL = 5: Guaranteed by design, not 100% tested in 6: FOSC = 40kHz, (RT = 1%, CT = F 1%,RD = 0 ).
6 Note 7: VCM = 0 to + 8: VCM = 0 to + 9: VC = + 10:VIN = +35V, RT = .UC1526 AUC2526 AUC3526A3 ELECTRICAL CHARACTERISTICS:PARAMETERTEST CONDITIONSUC1526 AUC2526 AUC3526 AUNITSMINTYPMAXMINTYPMAXSoft-Start SectionError Clamp VoltageRESET = + Charging CurrentRESET = + AOutput Drivers (Each Output) (Note 9)HIGH Output VoltageISOURCE = = 100mA12131213 VLOW Output VoltageISINK = = LeakageVC = 40V5015050150 ARise TimeCL = 1000pF (Note 5) sFall TimeCL = 1000pF (Note 5) sCross-Conduction Charge Per cycle, TJ = 25 C88nCPower Consumption (Note 10)Standby CurrentSHUTDOWN = + 4: IL = 5: Guaranteed by design, not 100% tested in 6: FOSC = 40kHz, (RT = 1%, CT = F 1%,RD = 0 ).
7 Note 7: VCM = 0 to + 8: VCM = 0 to + 9: VC = + 10:VIN = +35V, RT = .Open Loop Test Circuit UC1526A+VIN = 15V, and over operating ambient temperature, unless otherwise specified TA = INFORMATIONV oltage ReferenceThe reference regulator of the UC1526A is based on aprecision band-gap reference, internally trimmed to 1%accuracy. The circuitry is fully active at supply voltagesabove +7V, and provides up to 20mA of load current toexternal circuitry at + In systems where additionalcurrent is required, an external PNP transistor can beused to boost the available current. A rugged low fre-quency audio-type transistor should be used, and leadlengths between the PWM and transistor should be asshort as possible to minimize the risk of so, some types of transistors may require collec-tor-base capacitance for stability.
8 Up to 1 amp of loadcurrent can be obtained with excellent regulation if thedevice selected maintains high current CircuitThe soft-start circuit protects the power transistors andrectifier diodes from high current surges during powersupply turn-on. When supply voltage is first applied tothe UC1526A, the under-voltage lockout circuit holdsRESET LOW with Q3. Q1 is turned on, which holds thesoft-start capacitor voltage at zero. The second collectorof Q1 clamps the output of the error amplifier to ground,guaranteeing zero duty cycle at the driver the supply voltage reaches normal operatingrange, RESET will go HIGH.
9 Q1 turns off, allowing theinternal 100 A current source to charge CS. Q2 clampsthe error amplifier output to 1 VBE above the voltage onCS. As the soft-start voltage ramps up to +5V, the dutycycle of the PWM linearly increases to whatever valuethe voltage regulation loop requires for an error LockoutThe under-voltage lockout circuit protects the UC1526 Aand the power devices it controls from inadequate sup-ply voltage, If +VIN is too low, the circuit disables theoutput drivers and holds the RESET pin LOW. This pre-vents spurious output pulses while the control circuitry isstabilizing, and holds the soft-start timing capacitor in adischarged circuit consists of a + bandgap reference andcomparator circuit which is active when the referencevoltage has risen to 3 VBE or + at 25 C.
10 When thereference voltage rises to approximately + , the cir-cuit enables the output drivers and releases the RESETpin, allowing a normal soft-start. The comparator has350mV of hysteresis to minimize oscillation at the trippoint. When +VIN to the PWM is removed and the refer-ence drops to + , the under-voltage circuit pulls RE-SET LOW again. The soft-start capacitor is immediatelydischarged, and the PWM is ready for another soft-startcycle. The UC1526A can operate from a +5V supply by con-necting the VREF pin to the +VIN pin and maintaining thesupply between + and + Control PortsThe three digital control ports of the UC1526A are bi-di-rectional.
