RGY PACKAGE (TOP VIEW) CC - TI.com

1 SCDS054I MARCH 1998 REVISED OCTOBER 20031 POST OFFICE BOX 655303 DALLAS, TEXAS 75265D5- Switch Connection Between Two PortsDRail-to-Rail Switching on Data I/O PortsDIoff Supports Partial-Power-Down ModeOperationDLatch-Up Performance Exceeds 100 mA PerJESD 78, Class II12345678161514131211109B4B3B2B1 ANCOEGNDVCCB5B6B7B8S0S1S2D, DBQ, DGV, OR PW PACKAGE (TOP VIEW) NC No internal connectionRGY PACKAGE (TOP VIEW) 11689234567151413121110B5B6B7B8S0S1 B3B2B1 ANCOEB4S2 VGNDCCNC No internal connectiondescription/ordering informationThe SN74 CBTLV3251 device is a 1-of-8 high-speed FET multiplexer/demultiplexer. The low on-state resistanceof the switch allows connections to be made with minimal propagation select inputs (S0, S1, S2) control the data flow.

2 The FET multiplexers/demultiplexers are disabled whenthe output-enable (OE) input is device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures thatdamaging current will not backflow through the device when it is powered down. The device has isolation duringpower ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullupresistor; the minimum value of the resistor is determined by the current-sinking capability of the INFORMATIONTAPACKAGE ORDERABLEPART NUMBERTOP-SIDEMARKINGQFN RGYTape and reelSN74 CBTLV3251 RGYRCL251 SOIC DTubeSN74 CBTLV3251 DCBTLV3251 40 C to 85 CSOIC DTape and reelSN74 CBTLV3251 DRCBTLV3251 40 C to 85 CSSOP (QSOP)

3 DBQTape and reelSN74 CBTLV3251 DBQRCL251 TSSOP PWTape and reelSN74 CBTLV3251 PWRCL251 TVSOP DGVTape and reelSN74 CBTLV3251 DGVRCL251 PACKAGE drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelinesare available at 2003, Texas Instruments IncorporatedPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. !"#$%& " ' ()##* & %' "! +),- (%& " .%&*/ #".)(&' (" !"#$ &" '+*( ! (%& " ' +*# &0* &*#$' "! *1%' '&#)$* &''&% .%#. 2%##% &3/ #".)(& " +#"(*'' 4 ."*' "& *(*''%# -3 (-).*&*'& 4 "!))))

4 %-- +%#%$*&*#'/ SCDS054I MARCH 1998 REVISED OCTOBER 20032 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 FUNCTION TABLEINPUTSFUNCTIONOES2S1S0 FUNCTIONLLLLA port = B1 portLLLHA port = B2 portLLHLA port = B3 portLLHHA port = B4 portLHLLA port = B5 portLHLHA port = B6 portLHHLA port = B7 portLHHHA port = B8 portHXXXD isconnectlogic diagram (positive logic)B5B1AS0S1S2 OEB2B3B4B6B7B8 SWSWSWSWSWSWSWSW5111097432115141312 SCDS054I MARCH 1998 REVISED OCTOBER 20033 POST OFFICE BOX 655303 DALLAS, TEXAS 75265simplified schematic, each FET switchA(OE)Babsolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC V to V.. Input voltage range, VI (see Note 1) V to V.

5 Continuous channel current 128 mA.. Input clamp current, IK (VI/O < 0) 50 mA.. PACKAGE thermal impedance, JA (see Note 2): D PACKAGE 73 C/W.. (see Note 2): DBQ PACKAGE 90 C/W.. (see Note 2): DGV PACKAGE 120 C/W.. (see Note 2): PW PACKAGE 108 C/W.. (see Note 3): RGY PACKAGE 39 C/W.. Storage temperature range, Tstg 65 C to 150 C.. Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device : 1.

6 The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are The PACKAGE thermal impedance is calculated in accordance with JESD The PACKAGE thermal impedance is calculated in accordance with JESD operating conditions (see Note 4)MINMAXUNITVCCS upply control input voltageVCC = V to control input voltageVCC = V to V2 VVILLow-level control input voltageVCC = V to control input voltageVCC = V to free-air temperature 4085 CNOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

7 SCDS054I MARCH 1998 REVISED OCTOBER 20034 POST OFFICE BOX 655303 DALLAS, TEXAS 75265electrical characteristics over recommended operating free-air temperature range (unlessotherwise noted)PARAMETERTEST CONDITIONSMINTYP MAXUNITVIKVCC = 3 V,II = 18 mA = V,VI = VCC or GND 1 AIoffVCC = 0,VI or VO = 0 to V20 AICCVCC = V,IO = 0,VI = VCC or GND10 A ICC Control inputsVCC = V,One input at 3 V,Other inputs at VCC or GND300 ACiControl inputsVI = 3 V or 03pFCio(OFF)A portVO = 3 V or 0,OE = (OFF)B portVO = 3 V or 0,OE = VCC6pFVCC = V,VI = 0II = 64 mA58 VCC = V,TYP at VCC = VVI = 0II = 24 mA58ron TYP at VCC = VVI = V,II = 15 mA2740 ron VI = 0II = 64 mA57 VCC = 3 VVI = 0II = 24 mA57 VCC = 3 VVI = V,II = 15 mA1015 All typical values are at VCC = V (unless otherwise noted), TA = 25 C.

8 This is the increase in supply current for each input that is at the specified voltage level, rather than VCC or GND. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determinedby the lower of the voltages of the two (A or B) characteristics over recommended operating free-air temperature range (unlessotherwise noted) (see Figure 1)PARAMETERFROM(INPUT)TO(OUTPUT)VCC = V VVCC = V VUNITPARAMETER(INPUT)(OUTPUT)MINMAXMINMA XUNITtpdA or B B or or or The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, whendriven by an ideal voltage source (zero output impedance).

9 SCDS054I MARCH 1998 REVISED OCTOBER 20035 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATIONVCC/2thtsuFrom OutputUnder TestCL(see Note A)LOAD CIRCUITS12 VCCOpenGNDRLRLData InputTiming InputVCC0 VVCC0 V0 VtwInputVOLTAGE WAVEFORMSSETUP AND HOLD TIMESVOLTAGE WAVEFORMSPROPAGATION DELAY TIMESINVERTING AND NONINVERTING OUTPUTSVOLTAGE WAVEFORMSPULSE DURATIONtPLHtPHLtPHLtPLHVOHVOHVOLVOLVCC0 VInputOutputWaveform 1S1 at 2 VCC(see Note B)OutputWaveform 2S1 at GND(see Note B)VOLVOHtPZLtPZHtPLZtPHZVCC0 VVOL + V VOH V 0 VVCCVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESLOW- AND HIGH-LEVEL ENABLINGO utputOutputtPLH/tPHLtPLZ/tPZLtPHZ/tPZHOp en2 VCCGNDTESTS1 NOTES: A. CL includes probe and jig Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output 2 is for an output with internal conditions such that the output is high except when disabled by the output All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2 ns, tf 2 The outputs are measured one at a time with one transition per tPLZ and tPHZ are the same as tPZL and tPZH are the same as tPLH and tPHL are the same as All parameters and waveforms are not applicable to all V V V500 500 VV CL30 pF50 pFFigure 1.

10 Load Circuit and Voltage WaveformsPACKAGE OPTION 1 PACKAGING INFORMATIONO rderable DeviceStatus(1) PACKAGE TypePackageDrawingPinsPackageQtyEco Plan(2)Lead/Ball Finish(6)MSL Peak Temp(3)Op Temp ( C)Device Marking(4/5)Samples74 CBTLV3251 DBQRG4 ACTIVESSOPDBQ162500 Green (RoHS& no Sb/Br)CU NIPDAUL evel-2-260C-1 YEAR-40 to 85CL251SN74 CBTLV3251 DACTIVESOICD1640 Green (RoHS& no Sb/Br)CU NIPDAUL evel-1-260C-UNLIM-40 to 85 CBTLV3251SN74 CBTLV3251 DBQRACTIVESSOPDBQ162500 Green (RoHS& no Sb/Br)CU NIPDAUL evel-2-260C-1 YEAR-40 to 85CL251SN74 CBTLV3251 DGVRACTIVETVSOPDGV162000 Green (RoHS& no Sb/Br)CU NIPDAUL evel-1-260C-UNLIM-40 to 85CL251SN74 CBTLV3251 DRACTIVESOICD162500 Green (RoHS& no Sb/Br)CU NIPDAUL evel-1-260C-UNLIM-40 to 85 CBTLV3251SN74 CBTLV3251 PWRACTIVETSSOPPW162000 Green (RoHS& no Sb/Br)CU NIPDAUL evel-1-260C-UNLIM-40 to 85CL251SN74 CBTLV3251 RGYRACTIVEVQFNRGY163000 Green (RoHS& no Sb/Br)CU NIPDAUL evel-2-260C-1 YEAR-40 to 85CL251 (1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new : TI has announced that the device will be discontinued, and a lifetime-buy period is in : Not recommended for new designs.