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SCPS145B –DECEMBER 2007–REVISED FEBRUARY …

Product Sample & Technical Tools & Support &. Folder Buy Documents Software Community P82B715. SCPS145B DECEMBER 2007 REVISED FEBRUARY 2016. P82B715 I2C Bus Extender 1 Features 2 Applications 1 Operating Power-Supply Voltage Range of HDMI DDC. 3 V to 12 V Long I2C Communications Supports Bidirectional Data Transfer of I2C Bus Industrial Communications Signals Allows Bus Capacitance of 400 pF on Main I2C 3 Description Bus (Sx/Sy Side) and 3000 pF on Transmission The P82B715 is a device for buffering highly- Side (Lx/Ly Side) capacitive I2C bus systems, and it supports Dual Bidirectional Unity-Voltage-Gain Buffer With bidirectional data transfer through the I2C bus.

V CC Lx/LDA Ly/LCL GND Sy/SCL Sx/SDA P82B715 Buffer Buffer Product Folder Sample & Buy Technical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

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Transcription of SCPS145B –DECEMBER 2007–REVISED FEBRUARY …

1 Product Sample & Technical Tools & Support &. Folder Buy Documents Software Community P82B715. SCPS145B DECEMBER 2007 REVISED FEBRUARY 2016. P82B715 I2C Bus Extender 1 Features 2 Applications 1 Operating Power-Supply Voltage Range of HDMI DDC. 3 V to 12 V Long I2C Communications Supports Bidirectional Data Transfer of I2C Bus Industrial Communications Signals Allows Bus Capacitance of 400 pF on Main I2C 3 Description Bus (Sx/Sy Side) and 3000 pF on Transmission The P82B715 is a device for buffering highly- Side (Lx/Ly Side) capacitive I2C bus systems, and it supports Dual Bidirectional Unity-Voltage-Gain Buffer With bidirectional data transfer through the I2C bus.

2 The No External Directional Control Required P82B715 buffers both the serial data (SDA) and serial clock (SCL) signals on the I2C bus and allows Drives 10 Lower-Impedance Bus Wiring for for extension of the I2C bus, while retaining all the Improved Noise Immunity operating modes and features of the I2C system. Multi-Drop Distribution of I2C Signals Using Low- Cost Twisted-Pair Cables Device Information(1). I2C Bus Operation Over 50 Meters of Twisted-Pair PART NUMBER PACKAGE BODY SIZE (NOM). Wire SOIC (8) mm mm P82B715. Latch-up Performance Exceeds 100 mA Per PDIP (8) mm mm JESD 78, Class II (1) For all available packages, see the orderable addendum at the end of the data sheet.

3 ESD Protection Exceeds JESD 22. 2500-V Human-Body Model (A114-A). 400-V Machine Model (A115-A). 1000-V Charged-Device Model (C101). Block Diagram VCC. P82B715. Sx/SDA Buffer Lx/LDA. Sy/SCL Buffer Ly/LCL. GND. 1. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. P82B715. SCPS145B DECEMBER 2007 REVISED FEBRUARY 2016 Table of Contents 1 Features .. 1 Functional Block Diagram .. 7. 2 Applications .. 1 Feature 7. 3 Description .. 1 Device Functional 8. 4 Revision 2 9 Application and Implementation .. 9.

4 Application 9. 5 Pin Configuration and Functions .. 3. Typical Application .. 9. 6 4. Absolute Maximum Ratings .. 4 10 Power Supply Recommendations .. 13. ESD 4 11 13. Recommended Operating 4 Layout Guidelines .. 13. Thermal Information .. 4 Layout Example .. 13. Electrical 5 12 Device and Documentation Support .. 14. Switching Characteristics .. 5 Community 14. Typical Characteristics .. 6 Trademarks .. 14. 7 Parameter Measurement Information .. 6 Electrostatic Discharge Caution .. 14. Glossary .. 14. 8 Detailed Description .. 7. Overview .. 7 13 Mechanical, Packaging, and Orderable Information .. 14. 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

5 Changes from Revision A ( FEBRUARY 2008) to Revision B Page Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .. 1. 2 Submit Documentation Feedback Copyright 2007 2016, Texas Instruments Incorporated Product Folder Links: P82B715. P82B715. SCPS145B DECEMBER 2007 REVISED FEBRUARY 2016. 5 Pin Configuration and Functions P Package 8-Pin PDIP D Package Top View 8-Pin SOIC. Top View NC 1 8 VCC NC 1 8 VCC. Lx 2 7 Ly Lx 2 7 Ly Sx 3 6 Sy Sx 3 6 Sy 4 5.

6 GND NC. GND 4 5 NC. NC No internal connection Pin Functions PIN. I/O DESCRIPTION. NO. NAME. 1 NC No connection 2 Lx I/O Buffered serial data bus or LDA. 3 Sx I/O Serial data bus or SDA. Connect to VCC of I2C master through a pullup resistor. 4 GND Ground 5 NC No connection 6 Sy I/O Serial clock bus or SCL. Connect to VCC of I2C master through a pullup resistor. 7 Ly I/O Buffered serial clock bus or LCL. 8 VCC I Supply voltage Copyright 2007 2016, Texas Instruments Incorporated Submit Documentation Feedback 3. Product Folder Links: P82B715. P82B715. SCPS145B DECEMBER 2007 REVISED FEBRUARY 2016 6 Specifications Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1).

7 MIN MAX UNIT. VCC Supply voltage 12 V. 2. I C bus voltage Sx or Sy 0 VCC. Vb V. Buffered bus voltage Lx or Ly 0 VCC. Sx or Sy 60. IO Continuous output current mA. Lx or Ly 60. ICC Continuous current through VCC or GND 60 mA. Tstg Storage temperature 55 125 C. (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ESD Ratings VALUE UNIT.

8 Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) 2500. Charged-device model (CDM), per JEDEC specification JESD22- V(ESD) Electrostatic discharge 1000 V. C101 (2). Machine model (MM) 400. (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Recommended Operating Conditions MIN MAX UNIT. VCC Supply voltage (1) 12 V. TA Operating free-air temperature 40 85 C. (1) Operation with reduced performance is possible down to 3 V. Typical static sinking performance is not degraded at 3 V, but the dynamic sink currents while the output is being driven through VCC/2 are reduced and can increase fall times.

9 Timing-critical designs should accommodate the specified minimums. Thermal Information P82B715. THERMAL METRIC (1) D (SOIC) P (PDIP) UNIT. 8 PINS 8 PINS. R JA Junction-to-ambient thermal resistance C/W. R JC(top) Junction-to-case (top) thermal resistance C/W. R JB Junction-to-board thermal resistance C/W. JT Junction-to-top characterization parameter C/W. JB Junction-to-board characterization parameter 26 C/W. R JC(bot) Junction-to-case (bottom) thermal resistance N/A N/A C/W. (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 4 Submit Documentation Feedback Copyright 2007 2016, Texas Instruments Incorporated Product Folder Links: P82B715.

10 P82B715. SCPS145B DECEMBER 2007 REVISED FEBRUARY 2016. Electrical Characteristics VCC = 5 V, TA = 25 C, voltages are specified with respect to GND (unless otherwise specified). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT. Sx = Sy = VCC 14. VCC = 12 V 15. ICC Quiescent supply current mA. Both I2C inputs low, 22. Both buffered outputs sinking 30 mA. VCC > 3 V, VSx, VSy (low) = V, IIOS Output sink current on I2C bus Sx, Sy mA. VLx, VLy (low) on buffered bus = V, ILx, ILy = 3 mA (1). VLx, VLy (low) = V, 30. VSx, VSy (low) on I2C bus = V. 3 V < VCC < V, Output sink current on buffered VLx, VLy (low) = V to V, 24. IIOL Lx, Ly mA. bus ISx, ISy sinking on I2C bus < 4 mA.


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