Si4825-A10 - Silicon Labs

1 Rev. 5/13 Copyright 2013 by Silicon LaboratoriesSi4825 This information applies to a product under development. Its characteristics and specifications are subject to change without MECHANICAL TUNING AM/FM/SW RADIO RECEIVERF eaturesApplicationsDescriptionThe Si4825 is the entry level mechanical-tuned digital CMOS AM/FM/SW radioreceiver IC that integrates the complete receiver function from antenna input toaudio output. The Si4825 extends Silicon Laboratories multi-band tuner family,and further increases the ease and attractiveness of design radio reception toaudio devices through small size and board area, minimum component count, andsuperior, proven performance.

2 The Si4825 requires a simple application circuitand removes any requirements for manually tuning components during themanufacturing process. The receiver has very low power consumption, runs offtwo AAA batteries, and delivers the performance benefits of digital tuning to theanalog radio Block Diagram Worldwide FM band support (64 109 MHz) Worldwide AM band support (504 1750 kHz) SW band support ( MHz) No manual alignment necessary Mono audio output Selectable support AM/FM/SW regional bands Enhanced FM/SW band coverage Automatic frequency control (AFC) Integrated LDO regulator to V supply voltage Wide range of ferrite loop sticks and air loop antennas supported 16-pin SOIC RoHS-compliant Direct volume control Not EN55020 compliant**Note.

3 For consumer applications that require EN 55020 compliance, use Si483x. Table and portable radios Mini/micro systems CD/DVD players Boom boxes Modules Clock radios Mini HiFi Entertainment systemsSi4830 ~ OSCFMI0/90AM ANTFM ANTCONTROL INTERFACETUNE1/2 BANDXTALIRSTADCLNA_ENVOL+/-This product, its features, and/or itsarchitecture is covered by one or more ofthe following patents, as well as otherpatents, pending and issued, bothforeign and domestic: 7,127,217;7,272,373; 7,272,375; 7,321,324;7,355,476; 7,426,376; 7,471,940;7,339,503; 7,339, Information:See page AssignmentsSi4825-A10 (SOIC)FMIRFGNDAMIBANDTUNE2 TUNE1 LNA_ENNCRSTAOUTGNDVDDVOL-VOL+XTALOXTALI1 2345678910111216151413Si4825-A102 Rev.

4 OF CONTENTSS ectionPage1. Electrical Specifications .. 42. Typical Application Schematic .. 93. Bill of Materials .. 104. Functional Description .. Overview .. FM Receiver .. AM Receiver .. SW Receiver .. Frequency Tuning .. Band Select .. Volume Control .. Reset, Powerup, and Powerdown .. 125. Pin Descriptions: Si4825-A10 .. 136. Ordering Guide .. 147. Package Outline: Si4825-A10 .. 158. PCB Land Pattern: Si4825-A10 .. 179. Top Marking .. Si4825-A10 Top Marking .. Top Marking Explanation .. 1810. Additional Reference Resources .. 19 Document Change List ..20 Contact Information .. 21Si4825-A104 Rev. Electrical SpecificationsTable 1.

5 Recommended Operating Conditions1,2 ParameterSymbolTest ConditionMinTypMaxUnitSupply Voltage3 VDD2 Supply Powerup Rise TimeVDDRISE10 sAmbient Temperature RangeTA02570 CNote:1. Typical values in the data sheet apply at VDD = V and 25 C unless otherwise All minimum and maximum specifications in the data sheet apply across the recommended operating conditions for minimum VDD= V. 3. Operation at minimum VDD is guaranteed by characterization when VDD voltage is ramped down to V. Part initialization may become unresponsive below 2. DC Characteristics(VDD= to V, TA= 0 to 70 C)ParameterSymbolTest ConditionMinTypMaxUnitFM ModeSupply Current*IFM mAAM/SW ModeSupply Current*IAM mASupplies and InterfaceVDD Powerdown CurrentIDDPD 10 A*Note: Specifications are guaranteed by 1.

6 Reset TimingTable 3. Reset Timing Characteristics(VDD = to V, TA = 0 to 70 C)ParameterSymbolMinTypMaxUnitRSTB Pulse WidthtPRST100 sVDD valid time before RSTB risestSRST100 sRSTB low time before VDD becomes invalidtRRST0 must be held low for at least 100 s after the voltage supply has been ramped RSTB needs to be asserted (pulled low) prior to the supply voltage being ramped down. RSTBVDDtSRSTtPRSTtRRSTSi4825-A106 Rev. 4. FM Receiver Characteristics1,2(VDD = to V, TA = 0 to 70 C)ParameterSymbolTest ConditionMinTypMaxUnitInput FrequencyfRF64 109 MHzSensitivity with Headphone Network3(S+N)/N = 26 dB V EMFLNA Input Resistance4,5 4 k LNA Input Capacitance4,5 5 pFAM Suppression4,5,6,7m = 50 dBInput IP34,8 105 dB V EMFA djacent Channel Selectivity4 200 kHz 45 dBAlternate Channel Selectivity4 400 kHz 60 dBAudio Output Voltage5,6,7 72 mVRMSA udio Mono S/N5,6,7,9,10 45 dBAudio Frequency Response Low4 3 dB 30 HzAudio Frequency Response High4 3 dB15 kHzAudio THD6,5,11 %Audio Output Load Resistance4,10 RLSingle-ended10 k Audio Output Load Capacitance4,10 CLSingle-ended 50 testing information is available in AN569: Si4831/35/36/20/24/25-DEMO Board Test Procedure.

7 Volume = maximum for all tests. Tested at RF = To ensure proper operation and receiver performance, follow the guidelines in AN738: Si4825/36-A Antenna, Schematic, Layout, and Design Guidelines. Silicon Laboratories will evaluate schematics and layouts for qualified Frequency is 64~109 Guaranteed by VEMF=1 FMOD= 1 kHz, MONO, and L = R unless noted f = |f2 f1| > 2 MHz, f0=2xf1 BAF= 300 Hz to 15 kHz, At AOUT f = 75 5. AM/SW Receiver Characteristics1, 2(VDD = to V, TA = 0 to 70 C)Parameter Symbol Test Condition Min TypMax UnitInput Frequency fRF Medium Wave (AM)504 1750kHzShort Wave (SW) ,4,5(S+N)/N = 26 dB 30 V EMFL arge Signal Voltage Handling5 THD < 8% 300 mVRMSP ower Supply Rejection Ratio5 VDD=100 mVRMS, 100 Hz 40 dBAudio Output Voltage3,6 54 mVRMSA udio S/N3,4,6 45 dBAudio THD3,6 %Antenna Inductance5,7180 450 testing information is available in AN569: Si4831/35/36/20/24/25-DEMO Board Test Procedure.

8 Volume = maximum for all tests. Tested at RF = 6 To ensure proper operation and receiver performance, follow the guidelines in AN738: Si4825/36-A Antenna, Schematic, Layout, and Design Guidelines. Silicon Laboratories will evaluate schematics and layouts for qualified FMOD = 1 kHz, 30% modulation, 2 kHz channel BAF= 300 Hz to 15 kHz, Guaranteed by VIN= Stray capacitance on antenna and board must be < 10 pF to achieve full tuning range at higher inductance 6. Reference Clock and Crystal Characteristics(VDD = to V, TA = 0 to 70 C)ParameterSymbolTest ConditionMinTypMaxUnitReference ClockXTALI Supported Reference Clock Frequencies kHzReference Clock Frequency Tolerance for XTALI 100 100ppmCrystal OscillatorCrystal Oscillator Frequency kHzCrystal Frequency Tolerance 100 100ppmBoard Capacitance Table 7.

9 Thermal ConditionsParameterSymbolMinTypMaxUnitTh ermal Resistance* JA 80 C/WAmbient TemperatureTA02570 CJunction TemperatureTJ 77 C*Note: Thermal resistance assumes a multi-layer PCB with the exposed pad soldered to a topside PCB 8. Absolute Maximum Ratings1,2 ParameterSymbolValueUnitSupply VoltageVDD to Current3 IIN 10mAOperating TemperatureTOP 40 to 95 CStorage TemperatureTSTG 55 to 150 CRF Input device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond recommended operating conditions for extended periods may affect device The Si4825 devices are high-performance RF integrated circuits with certain pins having an ESD rating of < 2 kV HBM.

10 Handling and assembly of these devices should only be done at ESD-protected For input pins RST, VOL+, VOL , XTALO, XTALI, BAND, TUNE2, TUNE1, At RF input pins, FMI and Typical Application C4 close to VDD and GND Pin 15 GND connects directly to GND plane on Pin 5 leave To ensure proper operation and receiver performance, follow the guidelines in "AN738: Si4825/36-A Antenna, Schematic, Layout, and Design Guidelines." Silicon Labs will evaluate the schematics and layouts for qualified Pin 6 connects to the FM antenna interface and pin 8 connects to the AM antenna Place Si4825 as close as possible to antenna jack and keep the FMI and AMI traces as short as possible.