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Si5324 Data Sheet Any Frequency Precision Clock Multiplier ...

Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 2021Si5324 FeaturesApplicationsDescriptionThe Si5324 is a low-bandwidth, jitter-attenuating, Precision Clock multiplierfor applications requiring sub 1 ps jitter performance with loop bandwidthsbetween 4 Hz and 525 Hz. The Si5324 accepts two input clocks rangingfrom 2 kHz to 710 MHz and generates two output clocks ranging from 2 kHzto 945 MHz and select frequencies to GHz. The two outputs are divideddown separately from a common source. The Si5324 can also use itsexternal reference as a Clock source for Frequency synthesis.

Voltage CKOVD LVDS 100 load line-to-line 500 700 900 mVPP Low Swing LVDS 100 load line-to-line 350 425 500 mVPP Common Mode Output Voltage CKOVCM LVDS 100 load line-to-line 1.125 1.2 1.275 V Differential Output Resistance CKORD CML, LVPECL, LVDS — 200 — Output Voltage Low CKOVOLLH CMOS — — 0.4 V Output Voltage High CKOVOHLH VDD =1.71V …

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Transcription of Si5324 Data Sheet Any Frequency Precision Clock Multiplier ...

1 Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 2021Si5324 FeaturesApplicationsDescriptionThe Si5324 is a low-bandwidth, jitter-attenuating, Precision Clock multiplierfor applications requiring sub 1 ps jitter performance with loop bandwidthsbetween 4 Hz and 525 Hz. The Si5324 accepts two input clocks rangingfrom 2 kHz to 710 MHz and generates two output clocks ranging from 2 kHzto 945 MHz and select frequencies to GHz. The two outputs are divideddown separately from a common source. The Si5324 can also use itsexternal reference as a Clock source for Frequency synthesis.

2 The deviceprovides virtually any Frequency translation combination across thisoperating range. The Si5324 input Clock Frequency and Clock multiplicationratio are programmable via an I2C or SPI interface. The Si5324 is based onSkyworks Solutions' 3rd-generation DSPLL technology, which providesany- Frequency synthesis and jitter attenuation in a highly integrated PLLsolution that eliminates the need for external VCXO and filter DSPLL loop bandwidth is digitally programmable, providing jitterperformance optimization at the application level. The Si5324 is ideal forproviding Clock multiplication and jitter attenuation in high performancetiming applications.

3 Generates any Frequency from 2 kHz to 945 MHz and select frequencies to GHz from an input Frequency of 2 kHz to 710 MHz Ultra-low jitter Clock outputs as low as 290 fs rms (12 kHz 20 MHz), 320 fs rms (50 kHz 80 MHz) Integrated loop filter with selectable loop bandwidth (4 525 Hz) Meets ITU-T and Telcordia GR-253-CORE jitter specification Hitless input Clock switching with phase build-out Freerun, Digital Hold operation Configurable signal format per output (LVPECL, LVDS, CML, CMOS) Support for ITU and custom FEC ratios (255/238, 255/237, 255/236, 239/237, 66/64, 239/238, 15/14, 253/221, 255/238) LOL, LOS, FOS alarm outputs I2C or SPI programmable On-chip voltage regulator with high PSNR Single supply 5%, 10%, or V 10% Small size: 6 x 6 mm 36-lead QFN Pb-free, ROHS-compliant Broadcast video 3G/HD/SD-SDI, Genlock Packet Optical Transport Systems (P-OTS), MSPP OTN/OTU-1/2/3/4 Asynchronous Demapping (Gapped Clock ) SONET OC-48/192/768, SDH/STM-16/64/256 line cards 1/2/4/8/10G Fibre Channel line cards GbE/10/40/100G Synchronous Ethernet (LAN/WAN) Data converter clocking Wireless base stations Test and measurementANY- Frequency Precision Clock Multiplier /JITTER ATTENUATORO rdering Information.

4 See page Assignments12329303132333435362021222324 252627101112131415161745678 NCNCRSTC2 BINT_C1 BGNDVDDXAVDDRATE0 CKIN2+CKIN2 NCRATE1 CKIN1+CKIN1 CS_CASCLSDA_SDOA1A2_SSSDICKOUT1 NCGNDVDDNCCKOUT2 CKOUT2+CMODEGND PadA0 GND9181928 XBLOLGNDCKOUT1+Si53242 Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 2021 Functional Block DiagramDSPLL Loss of Signal/ Frequency OffsetXtal or RefclockCKOUT2 CKIN1 CKOUT1 CKIN2 N31 N2 NC1_LS NC2_LSSkew AdjustSignal DetectDevice InterruptVDD ( , , or V) GND N32 Loss of LockClock SelectI2C/SPI PortControlRate Select N1_HS Xtal/RefclockSi5324 Skyworks Solutions, Inc.

5 Phone [781] 376-3000 Fax [781] 376-3100 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 2021 TABLE OF CONTENTSS ectionPage1. Electrical Specifications .. 42. Typical Application Circuits .. 173. Functional Description .. External Reference .. Additional Documentation .. Typical Phase Noise Performance .. 214. Register Map .. 245. Register Descriptions .. ICAL .. 596. Pin Descriptions .. 607. Ordering Guide .. 648. Package Outline: 36-Pin QFN .. 679. PCB Land Pattern .. 6810. Top Marking .. Si5324 Top Marking (QFN) .. Top Marking Explanation .. 70 Document Change List ..71 Contact Information.

6 72Si53244 Skyworks Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 20211. Electrical SpecificationsFigure 1. Differential voltage CharacteristicsFigure 2. Rise/Fall Time CharacteristicsTable 1. Recommended Operating ConditionsParameterSymbolTest ConditionMinTypMaxUnitAmbient TemperatureTA 402585 CSupply voltage during Normal V V V :All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25 C unless otherwise , VOSEVID,VODD ifferential I/OsVICM, VOCMS ingle-EndedPeak-to-Peak VoltageDifferential Peak-to-Peak VoltageSIGNAL +SIGNAL (SIGNAL +) (SIGNAL )VtSIGNAL +SIGNAL VID = (SIGNAL+) (SIGNAL )VICM, VOCMtFtR80%20%CKIN, CKOUTSi5324 Skyworks Solutions, Inc.

7 Phone [781] 376-3000 Fax [781] 376-3100 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 2021 Table 2. DC Characteristics(VDD= 5%, 10%, or V 10%, TA= 40 to 85 C)ParameterSymbolTest ConditionMinTypMaxUnitSupply Current1 IDDLVPECL MHz OutBoth CKOUTs Enabled 251 279 mALVPECL MHz Out1 CKOUT Enabled 217 243 mACMOS MHz OutBoth CKOUTs Enabled 204 234 mACMOS MHz Out1 CKOUT Enabled 194 220 mADisable Mode 165 mACKINn Input Pins2 Input Common Mode voltage (Input Thresh-old voltage ) V 5% V 10%1 V 10% ResistanceCKNRINS ingle-ended204060k Single-Ended Input voltage Swing(See Absolute Specs)VISEfCKIN< MHz See Figure VPPfCKIN> MHz See Figure VPPD ifferential Input voltage Swing(See Absolute Specs)

8 VIDfCKIN< MHz See Figure VPPfCKIN > MHzSee Figure draw is independent of supply voltage2. No under- or overshoot is LVPECL outputs require nominal VDD This is the amount of leakage that the 3-Level inputs can tolerate from an external driver. See Si53xx Family Reference Manual for more LVPECL, CML, LVDS and low-swing LVDS measured with Fo = Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 2021 Output Clocks (CKOUTn)3,5 Common ModeCKOVCMLVPECL 100 load line-to-lineVDD VDD Output SwingCKOVDLVPECL 100 load Ended Output SwingCKOVSELVPECL 100 load Output VoltageCKOVDCML 100 load line-to-line350425500mVPPC ommon Mode Output VoltageCKOVCMCML 100 load line-to-line VDifferential Output VoltageCKOVDLVDS 100 load line-to-line500700900mVPPLow Swing LVDS 100 load line-to-line350425500mVPPC ommon Mode Output VoltageCKOVCMLVDS 100 load Output ResistanceCKORDCML, LVPECL, LVDS 200 Output voltage LowCKOVOLLHCMOS voltage HighCKOVOHLHVDD= x VDD VTable 2.

9 DC Characteristics (Continued)(VDD= 5%, 10%, or V 10%, TA= 40 to 85 C)ParameterSymbolTest draw is independent of supply voltage2. No under- or overshoot is LVPECL outputs require nominal VDD This is the amount of leakage that the 3-Level inputs can tolerate from an external driver. See Si53xx Family Reference Manual for more LVPECL, CML, LVDS and low-swing LVDS measured with Fo = Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 2021 Output Drive Current (CMOS driving into CKOVOL for output low or CKOVOH for output high. CKOUT+ and CKOUT shorted externally)CKOIOICMOS[1:0] = 11 VDD= mAICMOS[1:0] = 10 VDD= mAICMOS[1:0] = 01 VDD= mAICMOS[1:0] = 00 VDD= mAICMOS[1:0] = 11 VDD= 32 mAICMOS[1:0] = 10 VDD= 24 mAICMOS[1:0] = 01 VDD= 16 mAICMOS[1:0] = 00 VDD= 8 mA2-Level LVCMOS Input PinsInput voltage LowVILVDD= voltage HighVIHVDD= VVDD= VVDD= VTable 2.

10 DC Characteristics (Continued)(VDD= 5%, 10%, or V 10%, TA= 40 to 85 C)ParameterSymbolTest draw is independent of supply voltage2. No under- or overshoot is LVPECL outputs require nominal VDD This is the amount of leakage that the 3-Level inputs can tolerate from an external driver. See Si53xx Family Reference Manual for more LVPECL, CML, LVDS and low-swing LVDS measured with Fo = Solutions, Inc. Phone [781] 376-3000 Fax [781] 376-3100 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 23, 20213-Level Input Pins4 Input voltage LowVILL x VDDVI nput voltage xVDD voltage xVDD VInput Low CurrentIILLSee Note 4 20 AInput Mid CurrentIIMMSee Note 4 2 +2 AInput High CurrentIIHHSee Note 4 20 ALVCMOS Output PinsOutput voltage LowVOLIO = 2 mAVDD= VOutput voltage LowIO = 2 mAVDD= VOutput voltage HighVOHIO = 2 mAVDD= VOutput voltage HighIO = 2 mAVDD= VTable 2.


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