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TDA2x ADAS System-on-Chip - Texas Instruments

TDA2x adas System-on-Chip mix of performance, low power and integration of a video accelerator for Key Features and Benefits adas vision analytics processing decoding multiple video streams over Heterogeneous, scalable that aims to facilitate a more au- an Ethernet AVB network, along with architecture providing optimal tonomous and collision-free driving graphics accelerators for rendering mix of performance, low power experience. virtual views, enable a 3D viewing and adas vision analytics The TDA2x SoC enables experience. And the TDA2x SoC also Integration of peripherals sophisticated embedded vision integrates a host of peripherals in- Multi-camera interfaces technology in today's automobile by cluding multi-camera interfaces (both (parallel, serial), display, CAN, enabling the industry's broadest parallel and serial) for LVDS-based GigB Ethernet AVB r

vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing. With each core operating a 16 MAC-

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Transcription of TDA2x ADAS System-on-Chip - Texas Instruments

1 TDA2x adas System-on-Chip mix of performance, low power and integration of a video accelerator for Key Features and Benefits adas vision analytics processing decoding multiple video streams over Heterogeneous, scalable that aims to facilitate a more au- an Ethernet AVB network, along with architecture providing optimal tonomous and collision-free driving graphics accelerators for rendering mix of performance, low power experience. virtual views, enable a 3D viewing and adas vision analytics The TDA2x SoC enables experience. And the TDA2x SoC also Integration of peripherals sophisticated embedded vision integrates a host of peripherals in- Multi-camera interfaces technology in today's automobile by cluding multi-camera interfaces (both (parallel, serial), display, CAN, enabling the industry's broadest parallel and serial) for LVDS-based GigB Ethernet AVB range of adas applications including surround view systems, displays, Innovative vision front camera, park assist, surround CAN and GigB Ethernet AVB.

2 AccelerationPac (with EVEs) view and sensor fusion on a single The TDA2x SoC includes TI's which delivers more than 8 architecture. Front camera new vision AccelerationPac which improvement in performance applications include high-beam delivers more than 8 improvement in capabilities assist, lane-keep assist, adaptive compute performance for advanced Supports Front Camera, Park cruise control, traffic sign recognition, vision analytics than existing adas . Assist and Radar Sensor pedestrian / object detection, and systems at same power levels. Fusion technologies collision avoidance.

3 Park assist The vision AccelerationPac for this For Front Camera, optimal mix applications include intelligent 2D family of products includes multiple of performance and power and 3D surround view and rear embedded vision engines (EVEs). For Surround View, multiple collision warning and detection. The offloading the vision analytics flexible video input and output TDA2x SoC is also capable of the functionality from the application ports. Gig Ethernet AVB to fusion of radar and camera sensor processor while also reducing support LVDS- and Ethernet- data, allowing for a more robust the power footprint.

4 The vision based Surround View systems adas decision-making process in AccelerationPac is optimized for For Radar Sensor Fusion, the automobile. capability to support Radar on dual ARM Cortex -A15 TDA2x High-Speed Interconnect 28 nm and vision analytics on vision Architecture + vision AccelerationPac AcclerationPac The TDA2x SoC. *. << Up to quad EVEs ARM M4. Evaluation board and daughter ARM A15 ARM M4 * +. C66x DSP. incorporates a ARM A15 ARM M4 << . Video Front End card to enable Front Camera, heterogeneous, ARM M4 C66x DSP. 3 Video input ports for up Surround View and Sensor scalable architec- to 6 cameras Fusion applications system Mailbox system 13 Display Subsystem ture that includes Overlay a mix of TI's fixed- Up to L3 RAM w/ ECC GFX pipeline DVOUT.

5 Video pipeline HDMI. and floating-point DDR2/3 32b Overview TMS320C66x digi- w/ ECC. DDR2/3 32b Video Codec Accelerator TI's new TDA2x System-on-Chip tal signal proces- IVA HD 1080p video system Services (SoC) is a highly optimized and scal- sor (DSP) genera- Graphics Engine EDMA WDT 15 Timers able family of devices designed to tion cores, vision Up to dual SGX544. meet the requirements of leading AccelerationPac, ARM Cortex-A15 McASP JTAG Connectivity and I/O GPMC QSPI. Advanced Driver Assistance Systems ( adas ). The TDA2x family enables MPCore and PCIe GMAC. UART DCAN SPI 2.

6 IC NAND/. 10 2 4 5 NOR. broad adas applications in today's dual-Cortex-M4. automobile by integrating an optimal processors. The Figure 1. Block diagram for TDA2x SoC. Compute performance for same Another key component of the TDA2x power budget SoC is the integrated peripherals. Three video input ports, each with Relative no. of fixed-point 9. 16-bit multiples per Watt 8. two 16-bit sub-ports, provide 4 6. 7. 6 camera inputs needed for LVDS- 5 based surround vision applications. >8 . 4 The integrated high-performance 3. 2 Gigabit Ethernet with AVB enables 1 Ethernet-based surround view.

7 0.. Cortex -A15 (with Neon ) vision AccelerationPac Tools and software Figure 2. vision AccelerationPac: >8 Compute performance for same power budget with respect to TI's adas -related vision Software Cortex-A15. Design Kit (SDK) enables custom- ers to quickly and easily integrate vision processing with a 32-bit RISC generation C66x fixed-/floating-point the vision AccelerationPac and DSP. core for efficient program execution DSP cores that operate at up to 750 algorithms and then benchmark and a vector coprocessor for MHz to support high-level signal and partition them across multiple specialized vision processing.

8 With processing, and up to 750-MHz processing elements. The AV BIOS/. each core operating a 16 MAC- Cortex -A15 cores for control and vision SDK is a set of software per-cycle computing engine up to general-purpose processing. With development APIs, framework, tools 650 MHz (8 bit or 16 bit), the vision 200 MHz of processing performance, and documentation that allows the AccelerationPac is able to deliver the Cortex-M4 cores deliver efficient creation of vision and analytics over GMACs per core, for a control and processing camera applications for the TI TDA2x hard- total of >40 GMACs for quad EVEs stream.

9 TI's IVA-HD core is an ware platform. In addition to the devices. This provides the most imaging and video codec accelerator SDK, TI also has a number of librar- efficient vision analytics for real-time running at up to 532 MHz to enable ies available for vision kernels on vision -based automotive applications full HD video encode and decode. vision AccelerationPac and DSP. The and allows the most 16 bit 16 bit The TDA2x SoC has up to MB SDK and libraries reduce develop- multiplies as compared to other of on- chip L3 RAM with Single Error ment efforts and time to market while processor architectures.

10 Correct and Double Error Detect enabling customers to innovate and The TDA2x SoC includes a broad (SECDED) support to minimize differentiate on their solution. range of cores. It includes dual next- impact of Soft Error Rate (SER). TDA2x family development tools HDMI Out USB3 USB2 Ethernet FPD-Link Terminal Power TDA2x EVM is an evaluation platform MicroSD. (bottom) designed to speed up development efforts and reduce time to market for adas applications. Leopard Imaging Boot The main board integrates the key PCI Switches peripherals such as Ethernet, MLB/MLBP FPD-Link and HDMI, while the SATA.


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