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Technical Reference Manual - Texas Instruments

TMS320C28xExtendedInstructionSetsTechnic alReferenceManualLiteratureNumber:SPRUHS 1 AMarch2014 (FPU).. the the C28xplus Viterbi,ComplexMathand CRCUnit-II(VCU-II).. the 32-BitAccessesto (VSTATUS).. (RB).. March2014 RevisedDecember2015 SubmitDocumentationFeedbackCopyright 2014 2015, (CRC) (TMU).. the C28x+ DelaySlot Operationson the March2014 RevisedDecember2015 ContentsSubmitDocumentationFeedbackCopyr ight 2014 2015, of StatusRegister(STF).. (RB).. + + FPU+ (VSTATUS).. (RB).. + FCU+ of Status(STF) (RB) (VSTATUS) (RB) DelaySlot(s).

Preface SPRUHS1A–March 2014–Revised December 2015 Read This First This document describes the architecture, pipeline, and instruction sets of the TMU, VCU-II, and FPU

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Transcription of Technical Reference Manual - Texas Instruments

1 TMS320C28xExtendedInstructionSetsTechnic alReferenceManualLiteratureNumber:SPRUHS 1 AMarch2014 (FPU).. the the C28xplus Viterbi,ComplexMathand CRCUnit-II(VCU-II).. the 32-BitAccessesto (VSTATUS).. (RB).. March2014 RevisedDecember2015 SubmitDocumentationFeedbackCopyright 2014 2015, (CRC) (TMU).. the C28x+ DelaySlot Operationson the March2014 RevisedDecember2015 ContentsSubmitDocumentationFeedbackCopyr ight 2014 2015, of StatusRegister(STF).. (RB).. + + FPU+ (VSTATUS).. (RB).. + FCU+ of Status(STF) (RB) (VSTATUS) (RB) DelaySlot(s).

2 ,source1, :Additionwith RightShiftand :Additionwith Requirementsfor of FiguresSPRUHS1A March2014 RevisedDecember2015 SubmitDocumentationFeedbackCopyright 2014 2015,TexasInstrumentsIncorporatedPreface SPRUHS1A March2014 RevisedDecember2015 ReadThisFirstThisdocumentdescribesthe architecture, pipeline ,and instructionsetsof the TMU,VCU-II,and TMS320C2000 digitalsignalprocessor(DSP)platformis part of the TMS320 documentusesthe followingconventions. Hexadecimalnumbersare shownwith the suffixh or with a leading0x.

3 For example,the followingnumberis 40 hexadecimal(decimal64): 40h or 0x40. Registersin this documentare shownas figuresand describedin tables. Eachregisterfigureshowsa rectangledividedinto fieldsthat representthe fieldsof the is labeledwith its bit name,its beginningand endingbit numbersabove,and legendexplainsthe notationusedfor the properties Reservedbits in a registerfiguredesignatea bit that is usedfor followingbooksdescribethe TMS320x28xand relatedsupporttoolsthat are availableon the TIwebsite:DataManualand Errata SPRS439 TMS320F28335,TMS320F28334,TMS320F28332,T MS320F28235,TMS320F28234,TMS320F28232 DigitalSignalControllers(DSCs)DataManual containsthe pinout,signaldescriptions,as well as electricaland timingspecificationsfor the F2833 TMS320F28335,F28334,F28332,TMS320F28235, F28234,F28232 DigitalSignalControllers(DSCs)SiliconErr atadescribesthe advisoriesand usagenotesfor 'sGuides SPRU430 TMS320C28xCPUand InstructionSet ReferenceGuidedescribesthe centralprocessingunit (CPU)

4 And the assemblylanguageinstructionsof the TMS320C28xfixed-pointdigitalsignalproces sors(DSPs).It also describesemulationfeaturesavailableon TMS320C28xFloatingPointUnitand InstructionSet ReferenceGuidedescribesthefloating-point unit and includesthe instructionsfor the SPRU566 TMS320x28xx,28xxxDSPP eripheralReferenceGuidedescribesthe peripheralreferenceguidesof the 28x digitalsignalprocessors(DSPs).SPRUFB0 TMS320x2833x,2823xSystemControland InterruptsReferenceGuidedescribesthevari ousinterruptsand systemcontrolfeaturesof the 2833xand 2823xdigitalsignalcontrollers(DSCs).

5 SPRU812 TMS320x2833x,2823xAnalog-to-DigitalConve rter(ADC)ReferenceGuidedescribeshow to configureand use the on-chipADCmodule,whichis a TMS320x2833x,2823xDSCE xternalInterface(XINTF)ReferenceGuidedes cribestheXINTF,whichis a nonmultiplexedasynchronousbus, as it is usedon the 2833xand March2014 RevisedDecember2015 ReadThis FirstSubmitDocumentationFeedbackCopyrigh t 2014 2015, TMS320x2833x,2823xBootROMR eferenceGuidedescribesthe purposeand featuresofthe bootloader(factory-programmedboot-loadin gsoftware)and providesexamplesof alsodescribesothercontentsof the deviceon-chipbootROMand identifieswhereall of the informationis locatedwithinthat TMS320x2833x,2823xMultichannelBufferedSe rialPort(McBSP)ReferenceGuidedescribesth e McBSPavailableon the 2833xand McBSPsallowdirectinterfacebetweena DSPand otherdevicesin a TMS320x2833x,2823xDirectMemoryAccess(DMA )ModuleReferenceGuidedescribesthe DMAon the 2833xand TMS320x2833x,2823xEnhancedPulseWidthModu lator(ePWM)

6 ModuleReferenceGuidedescribesthe mainareasof the enhancedpulsewidthmodulatorthat includedigitalmotorcontrol,switchmodepow ersupplycontrol,UPS(uninterruptiblepower supplies),and TMS320x2833x,2823xHigh-ResolutionPulseWi dthModulator(HRPWM)ReferenceGuidedescrib esthe operationof the high-resolutionextensionto the pulsewidthmodulator(HRPWM).SPRUFG4 TMS320x2833x,2823xEnhancedCapture(eCAP)M oduleReferenceGuidedescribesthe includesthe moduledescriptionand TMS320x2833x,2823xEnhancedQuadratureEnco derPulse(eQEP)ModuleReferenceGuidedescri besthe eQEPmodule,whichis usedfor interfacingwith a linearor rotaryincrementalencoderto get position,direction,and speedinformationfroma rotatingmachineinhigh-performancemotiona nd includesthe TMS320x2833x,2823xEnhancedControllerArea Network(eCAN)

7 ReferenceGuidedescribesthe eCANthat usesestablishedprotocolto communicateseriallywith TMS320x2833x,2823xSerialCommunicationsIn terface(SCI)ReferenceGuidedescribesthe SCI,whichis a two-wireasynchronousserialport,commonlyk nownas a modulessupportdigitalcommunicationsbetwe enthe CPUand otherasynchronousperipheralsthat use the standardnon-return-to-zero(NRZ) TMS320x2833x,2823xDSCS erialPeripheralInterface(SPI)ReferenceGu idedescribesthe SPI - a high-speedsynchronousserialinput/output( I/O)port - that allowsa serialbitstreamof programmedlength(oneto sixteenbits) to be shiftedinto and out of the deviceat TMS320x2833x,2823xInter-IntegratedCircui t(I2C)ModuleReferenceGuidedescribesthe featuresand operationof the inter-integratedcircuit(I2C) SPRU513 'sGuidedescribesthe assemblylanguagetools(assemblerand othertoolsusedto developassemblylanguagecode)

8 ,assemblerdirectives,macros,commonobject file format,and symbolicdebuggingdirectivesfor TMS320C28xOptimizingC/C++ 'sGuidedescribestheTMS320C28x C/C++ compileracceptsANSI standardC/C++sourcecodeandproducesTMS320 DSPassemblylanguagesourcecodefor the TMS320C28xInstructionSet SimulatorTechnicalOverviewdescribesthe simulator,availablewithinthe CodeComposerStudiofor TMS320C2000 IDE,that simulatesthe instructionset of the C28x TMS320C28 (API) FirstSPRUHS1A March2014 RevisedDecember2015 SubmitDocumentationFeedbackCopyright 2014 2015, ,C28x,TMS320C2000are trademarksof March2014 RevisedDecember2015 ReadThis FirstSubmitDocumentationFeedbackCopyrigh t 2014 2015, FirstSPRUHS1A March2014 RevisedDecember2015 SubmitDocumentationFeedbackCopyright 2014 2015,TexasInstrumentsIncorporatedChapter 1 SPRUHS1A March2014 RevisedDecember2015 FloatingPointUnit(FPU)TheTMS320C2000 DSPfamilyconsistsof fixed-pointandfloating-pointdigitalsigna lcontrollers(DSCs).

9 TMS320C2000 DigitalSignalControllerscombinecontrolpe ripheralintegrationand easeofuseof a microcontroller(MCU)withthe processingpowerandC efficiencyof TI s overviewof the architecturalstructureand componentsof the C28xplus floating-pointunit the March2014 RevisedDecember2015 FloatingPointUnit (FPU)SubmitDocumentationFeedbackCopyrigh t 2014 2015,TexasInstrumentsIncorporatedProgram address bus (22)Program data bus (32)Read address bus (32)Read data bus (32)Write data bus (32)Existingmemory,peripherals,interface sPIEW rite address bus (32)LVFLUFC28x+ C28xplus floating-point(C28x+FPU)processorextends the capabilitiesof the C28xfixed-pointCPUby addingregistersand instructionsto devicedrawsfromthe best featuresof digitalsignalprocessing;reducedinstructi onset computing(RISC).

10 Andmicrocontrollerarchitectures,firmware ,and tool DSCfeaturesincludea modifiedHarvardarchitectureand RISC featuresare single-cycleinstructionexecution,registe r-to-registeroperations,and modifiedHarvardarchitecture(usablein Von Neumannmode).Themicrocontrollerfeaturesi ncludeeaseof use throughan intuitiveinstructionset, byte packingandunpacking,and bit modifiedHarvardarchitectureof the CPUenablesinstructionanddatafetchesto be performedin CPUcan readinstructionsand datawhileit writesdatasimultaneouslyto maintainthe single-cycleinstructionoperationacrossth e CPUdoesthisoversix documentthe followingnotationsare used: C28xrefersto the C28xfixed-pointCPU.


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