TMS320x2803x Piccolo Control Law Accelerator …

1 TMS320x2803xPiccoloControlLawAccelerator (CLA)ReferenceGuideLiteratureNumber:SPRU GE6 BMay2009 RevisedMay20102 SPRUGE6B May2009 RevisedMay2010 Copyright 2009 2010, (CLA) May2009 RevisedMay2010 TableofContentsCopyright 2009 2010, (MVECT1/2/3/4/5/6/7/8) (MCTL)..184 MemoryConfigurationRegister(MMEMCFG)..20 5 CLAP eripheralInterruptSourceSelect1 Register(MPISRCSEL1)..216 InterruptEnableRegister(MIER)..227 InterruptFlagRegister(MIFR)..238 InterruptOverflowFlagRegister(MIOVF)..24 9 InterruptRunStatusRegister(MIRUN)..2510 InterruptForceRegister(MIFRC)..2611 InterruptFlagClearRegister(MICLR)..2712 InterruptOverflowFlagClearRegister(MICLR OVF)..2813 ProgramCounter(MPC)..2914 CLAS tatusRegister(MSTF).. (MVECT1/2/3/4/5/6/7/8) (MCTL) (MMEMCFG) (MPISRCSEL1) (MIER) (MIFR) (MIOVF) (MIRUN) (MIFRC) (MICLR) (MICLROVF) (MPC) (MSTF) ,source1, , , , , ,MRa, # , ,# , May2009 RevisedMay2010 Copyright 2009 2010, , May2009 RevisedMay2010 ListofTablesCopyright 2009 2010,TexasInstrumentsIncorporatedPreface SPRUGE6B May2009 RevisedMay2010 ReadThisFirstTheC28xControlLawAccelerato r(CLA)is anindependent,fully-programmable, toreadADCsamples"just-in-time.

2 " , ,28xxxDSPP eripheralReferenceGuide(SPRU566) fora listofalldeviceswitha CLAmoduleofthesametype,todeterminethedif ferencesbetweenthetypes,andfora listofdevice-specificdifferenceswithina ,pipeline,instructionset, is partoftheTMS320 Hexadecimalnumbersareshownwiththesuffixh orwitha ,thefollowingnumberis 40hexadecimal(decimal64):40hor0x40. Registersin thisdocumentareshownin figuresanddescribedin tables. Eachregisterfigureshowsa labeledwithitsbitname,itsbeginningandend ingbitnumbersabove, legendexplainsthenotationusedfortheprope rties. Reservedbitsin a registerfiguredesignatea bitthatis :SPRS584 TMS320F28032,TMS320F28033,TMS320F28034,T MS320F28035 PiccoloMicrocontrollersDataManualcontain sthepinout,signaldescriptions, TMS320F28032,TMS320F28033,TMS320F28034, 'sGuides SPRU430 TMS320C28xCPUandInstructionSetReferenceG uidedescribesthecentralprocessingunit(CP U)andtheassemblylanguageinstructionsofth eTMS320C28xfixed-pointdigitalsignalproce ssors(DSPs).It SPRUGL8 TMS320x2803xPiccoloSystemControlandInter ruptsReferenceGuidedescribesthevariousin terruptsandsystemcontrolfeaturesofthe280 3xmicrocontrollers(MCUs).

3 6 PrefaceSPRUGE6B May2009 RevisedMay2010 Copyright 2009 2010, TMS320x28xx,28xxxDSPP eripheralReferenceGuidedescribestheperip heralreferenceguidesofthe28xdigitalsigna lprocessors(DSPs).SPRUGO0 TMS320x2803xPiccoloBootROMR eferenceGuidedescribesthepurposeandfeatu resofthebootloader(factory-programmedboo t-loadingsoftware) TMS320x2803xPiccoloControlLawAccelerator (CLA)ReferenceGuidedescribestheoperation oftheControlLawAccelerator(CLA).SPRUGE2 TMS320x2803xPiccoloLocalInterconnectNetw ork(LIN)ModuleReferenceGuidedescribesthe operationoftheLocalInterconnectNetwork(L IN) TMS320x2803xPiccoloEnhancedQuadratureEnc oderPulse(eQEP)ReferenceGuidedescribesth eoperationoftheEnhancedQuadratureEncoder Pulse(eQEP).SPRUGL7 TMS320x2803xPiccoloEnhancedControllerAre aNetwork(eCAN)ReferenceGuidedescribesthe operationoftheEnhancedControllerAreaNetw ork(eCAN).SPRUGE5 TMS320x2802x,2803xPiccoloAnalog-to-Digit alConverter(ADC)andComparatorReferenceGu idedescribeshowtoconfigureandusetheon-ch ipADCmodule,whichis a TMS320x2802x,2803xPiccoloEnhancedPulseWi dthModulator(ePWM)ModuleReferenceGuidede scribesthemainareasoftheenhancedpulsewid thmodulatorthatincludedigitalmotorcontro l,switchmodepowersupplycontrol,UPS(unint erruptiblepowersupplies), TMS320x2802x,2803xPiccoloHigh-Resolution PulseWidthModulator(HRPWM)describestheop erationofthehigh-resolutionextensiontoth epulsewidthmodulator(HRPWM).

4 SPRUGH1 TMS320x2802x,2803xPiccoloSerialCommunica tionsInterface(SCI) TMS320x2802x,2803xPiccoloEnhancedCapture (eCAP) TMS320x2802x,2803xPiccoloSerialPeriphera lInterface(SPI)ReferenceGuidedescribesth eSPI- a high-speedsynchronousserialinput/output( I/O)port- thatallowsa serialbitstreamofprogrammedlength(onetos ixteenbits) TMS320x2802x,2803xPiccoloInter-Integrate dCircuit(I2C)ReferenceGuidedescribesthef eaturesandoperationoftheinter-integrated circuit(I2C) SPRU513 'sGuidedescribestheassemblylanguagetools (assemblerandothertoolsusedtodevelopasse mblylanguagecode),assemblerdirectives,ma cros,commonobjectfileformat, TMS320C28xOptimizingC/C++ 'sGuidedescribestheTMS320C28x C/C++ ++ TMS320C28xInstructionSetSimulatorTechnic alOverviewdescribesthesimulator,availabl ewithintheCodeComposerStudioforTMS320C20 00 IDE,thatsimulatestheinstructionsetoftheC 28x , May2009 RevisedMay2010 ReadThisFirstCopyright 2009 2010,TexasInstrumentsIncorporatedReferen ceGuideSPRUGE6B May2009 RevisedMay2010 TMS320x2803xPiccoloControlLawAccelerator (CLA)TheC28xControlLawAccelerator(CLA)is anindependent,fully-programmable, toreadADCsamples"just-in-time".

5 , (CLA) , a listofmajorfeaturesoftheCLA. ClockedatthesamerateasthemainCPU(SYSCLKO UT). AnindependentarchitectureallowingCLAalgo rithmexecutionindependentofthemainC28xCP U. Completebusarchitecture: Programaddressbusandprogramdatabus Dataaddressbus,datareadbusanddatawritebu s Independenteightstagepipeline. 12-bitprogramcounter(MPC) Four32-bitresultregisters(MR0-MR3) Two16-bitauxiliaryregisters(MAR0,MAR1) Statusregister(MSTF) Instructionsetincludes: IEEE single-precision(32-bit)floatingpointmat hoperations Floating-pointmathwithparallelloadorstor e Floating-pointmultiplywithparalleladdors ubtract 1/Xand1/sqrt(X)estimations Datatypeconversions. Conditionalbranchandcall Dataload/storeoperations TheCLAprogramcodecanconsistofuptoeightta sksorinterruptserviceroutines. Thestartaddressofeachtaskis specifiedbytheMVECT registers. Nolimitontasksizeaslongasthetasksfit withintheCLAprogrammemoryspace. Onetaskis servicedata nonestingoftasks. Upontaskcompletiona task-specificinterruptis flaggedwithinthePIE.

6 Whena taskfinishesthenexthighest-prioritypendi ngtaskis automaticallystarted. Tasktriggermechanisms: C28xCPUviatheIACK instruction Task1toTask7 : Task1:ADCINT1orEPWM1_INT8 TMS320x2803xPiccoloControlLawAccelerator (CLA)SPRUGE6B May2009 RevisedMay2010 Copyright 2009 2010,TexasInstrumentsIncorporatedMVECT1 MIFRMIERMIFRCMVECT2 MIRUNMPERINT1toMPERINT8 PIEP eripheral InterruptsADCINT1 toADCINT8 EPWM1_INT toINTEPWM7_INTCLAP rogramMemoryMMEMCFGMR0(32)MPC(12)MR1(32) MR3(32)MAR0(32)MSTF(32)MR2(32)MAR1(32)MI OVFMICLRMCTLMICLROVFMPISRCSEL1 MVECT3 MVECT4 MVECT5 MVECT6 MVECT7 MVECT8 Main28xCPUINT11 Main CPU BUSINT12 CPU Timer 0 Map to CLA orCPU SpaceCLADataMemoryComparatorRegistersePW MandHRPWMR egistersADCR esultRegistersCLAS haredMessageRAMsMain CPU Read/Write Data BusCLA Data Read Address BusCLA Data Write Data BusCLA Data Write Address BusCLA Data Read Data BusCLA Program Address BusCLA Program Data BusMEALLOWMain CPU Read Data BusMap to CLA orCPU SpaceCLAData BusMain CPU BusCLA ExecutionRegistersCLA ControlRegistersSYSCLKOUTCLAENCLKSYSRSLV FLUFCLA_INT1 to (CLA)Overview Task2:ADCINT2orEPWM2_INT Task7:ADCINT7orEPWM7_INT Task8.

7 ADCINT8orbyCPUT imer0. MemoryandSharedPeripherals: TwodedicatedmessageRAMsforcommunicationb etweentheCLAandthemainCPU. TheC28xCPUcanmapCLAprogramanddatamemoryt othemainCPUspaceorCLAspace. TheCLAhasdirectaccesstotheePWM+HRPWM, May2009 RevisedMay2010 TMS320x2803xPiccoloControlLawAccelerator (CLA)Copyright 2009 2010, :program, describedin detailin AppendixA. CLAP rogramMemoryAtresetmemorydesignatedforCL Aprogramis mappedtothemainCPUmemoryandis , initializedwithCLAcode,themainCPUmapsit totheCLAprogramspacebywritinga 1 totheMMEMCFG[PROGE] , theCLAis executingcode, ,thisalignmentnaturallyoccurs. , , initializedwithCLAdatathemainCPUmapsit [RAM0E]andMMEMCFG[RAM1E] , ;noprogramfetchescanbeperformed. alsoreadablebythemainCPUbutwritesbythema inCPUareignored. a programread, ,datareadanddatawritein a , theaddress-generationlogicgeneratesanodd address, CLAP rogramBusTheCLAprogrambushasa ,thisbusalwaysfetches32-bitsata devicedependentasdescribedin thedevice-specificdatamanual.

8 CLADataReadBusTheCLAdatareadbushasa 64Kx (CLA)SPRUGE6B May2009 RevisedMay2010 Copyright 2009 2010, ,CLAdatamemoryandtheePWM,HRPWM,Comparato randADCresultregisters. CLADataWriteBusTheCLAdatawritebushasa 64Kx ,CLAdatamemoryandtheePWM,HRPWM, ,HRPWM,Comparator, describesin themainCPUstatusregister1 (ST1) theCLAstatusregister(MSTF) usedtostarta shownin May2009 RevisedMay2010 TMS320x2803xPiccoloControlLawAccelerator (CLA)Copyright 2009 2010, taskbeginsbythecontentoftheassociatedint erruptvector(MVECT1toMVECT8)andtheendis hasthehighestpriorityandtask8 taskcanberequestedbya peripheralinterruptorbysoftware: PeripheralinterrupttriggerEachtaskhasspe cificinterruptsourcesthatcantriggerit. ,task1 (MVECT1)canbetriggeredbyADCINT1orEPWM1_I NTasspecifiedin MPISRCSEL1[PERINT1 SEL].Youcannot,however, youneedtotriggera taskusingEPWM2_INTthenthebestsolutionis tousetask2 (MVECT2).Anotherpossiblesolutionis totakeEPWM2_INTwiththemainCPUandtriggera moreefficientbecauseit [IACKE] theoperandoftheIACK instructioncorrespondstoa #0x0001willsetbit0 in #0x0003willsetbits0 and1 in theMIFR registertostarttask1 servicedata time;thereis theflagregister(MIFR).

9 If aninterruptrequestfroma peripheralis receivedandthatsametaskis alreadyflagged,thentheoverflowflagbitis theCLAis idle(notaskis currentlyrunning)thenthehighestpriorityi nterruptrequestthatis bothflagged(MIFR)andenabled(MIER) set(MIRUN)andtheflagbit(MIFR)is (MVECTx).MVECTis taskcompletesthenexthighest-prioritypend ingtaskis (CLA)SPRUGE6B May2009 RevisedMay2010 Copyright 2009 2010, CLAA pplicationTheControlLawAcceleratoris programmedin CLAassemblycodeusingtheinstructionsdescr ibedinSection6. CLAassemblycodecan,andshould,residein theCLAcodemustbein C orC++ ,if needed,initializetheCLAdataRAM(s).Oncesy steminitializationis completeandtheapplicationbegins,theCLAwi llserviceitsinterruptsusingtheCLAassembl ycode(ortasks). set:--cla_support= typicalCLAinitializationsequenceis performedbythemainCPUasdescribedin theflashora datastreamfroma communicationsperipheraloranywherethemai nCPUcanaccessit. ,butkeepinterruptsdisableduntillater(lea veMIER==0): definedin thedevice-specificsystemcontrolandinterr uptsreferenceguide.

10 Anoffsetfromthefirstaddressin ,0x0000correspondstothefirstCLAprogramme moryaddress. SelectthetaskinterruptsourcesForeachtask selecttheinterruptsourcein a taskis goingtobegeneratedbysoftware,selectnoint errupt. EnableIACK tostarta taskfromsoftwareif desiredToenabletheIACK instructiontostarta tasksettheMCTL[IACKE] MapCLAdataRAM(s)toCLAspaceif necessaryMapeitherorbothofthedataRAMstot heCLAspacebywritinga 1 totheMMEMCFG[RAM0E]andMMEMCFG[RAM1E] mappedtoCLAspacethemainCPUcannotaccessit . AllowtwoSYSCLKOUT cyclesbetweenchangingthemapconfiguration ofthismemoryandaccessingit. MapCLAprogramRAMtoCLAspaceMaptheCLAprogr amRAMtoCLAspacebysettingtheMMEMCFG[PROGE ] CLAtaskcompletestheassociatedinterruptin May2009 RevisedMay2010 TMS320x2803xPiccoloControlLawAccelerator (CLA)Copyright 2009 2010, theinterruptenableregister(MIER) (ePWM,ADCetc.)thatwillgenerateaninterrup ttotheCLAandbeservicedbya (CLA)SPRUGE6B May2009 RevisedMay2010 Copyright 2009 2010, a breakpointinCLAcodeInserta CLAbreakpoint(MDEBUGSTOP instruction)intothecodewhereyouwanttheCL Atohalt, , CLAbreakpointsarenotenabled,thentheMDEBU GSTOP willbeignoredandis theCLAcodeaslongasit is notwithinthreeinstructionsofa MBCNDD,MCCNDD, ,enabletheCLAbreakpointsin ,thisis donebyconnectingtheCLAdebugwindow(debug- >connect).