TMS320x2833x, 2823x Direct Memory Access …

1 TMS320x2833x, 2823xDirectMemoryAccess(DMA )ModuleReferenceGuideLiteratureNumber:SP RUFB8 DSeptember2007 RevisedApril20112 SPRUFB8D September 2007 Revised April 2011 Submit Documentation Feedback 2007 2011, Texas Instruments (XINTF) (DMACTRL) (DEBUGCTRL) (REVISION).. (PRIORITYCTRL1) (PRIORITYSTAT).. (MODE) (CONTROL) (BURST_SIZE) (SRC_BURST_STEP) (DST_BURST_STEP) (TRANSFER_SIZE) (TRANSFER_COUNT).. (SRC_TRANSFER_STEP) (DST_TRANSFER_STEP) (SRC/DST_WRAP_SIZE) EALLOW protected).. (SCR/DST_WRAP_COUNT).. (SRC/DST_WRAP_STEP) (SRC_BEG_ADDR_SHADOW/DST_BEG_ADDR_SHADOW ) (SRC_BEG_ADDR/DST_BEG_ADDR).. (SRC_ADDR_SHADOW/DST_ADDR_SHADOW) (SRC_ADDR/DST_ADDR).

2 September2007 RevisedApril2011 TableofContentsSubmitDocumentationFeedba ck 2007 2011, (McBSPassource).. (DMACTRL)..269 DebugControlRegister(DEBUGCTRL)..2710 RevisionRegister(REVISION)..2711 PriorityControlRegister1 (PRIORITYCTRL1)..2812 PriorityStatusRegister(PRIORITYSTAT)..29 13 ModeRegister(MODE)..3014 ControlRegister(CONTROL)..3215 BurstSizeRegister(BURST_SIZE)..3416 BurstCountRegister(BURST_COUNT)..3417 SourceBurstStepSizeRegister(SRC_BURST_ST EP)..3518 DestinationBurstStepRegisterSize(DST_BUR ST_STEP)..3619 TransferSizeRegister(TRANSFER_SIZE)..362 0 TransferCountRegister(TRANSFER_COUNT)..3 721 SourceTransferStepSizeRegister(SRC_TRANS FER_STEP).

3 3722 DestinationTransferStepSizeRegister(DST_ TRANSFER_STEP)..3823 Source/DestinationWrapSizeRegister(SRC/D ST_WRAP_SIZE)..3824 Source/DestinationWrapCountRegister(SCR/ DST_WRAP_COUNT)..3925 Source/DestinationWrapStepSizeRegisters( SRC/DST_WRAP_STEP)..3926 ShadowSourceBeginandCurrentAddressPointe rRegisters(SRC_BEG_ADDR_SHADOW/DST_BEG_A DDR_SHADOW)..4027 ActiveSourceBeginandCurrentAddressPointe rRegisters(SRC_BEG_ADDR/DST_BEG_ADDR)..4 028 ShadowDestinationBeginandCurrentAddressP ointerRegisters(SRC_ADDR_SHADOW/DST_ADDR _SHADOW)..4129 ActiveDestinationBeginandCurrentAddressP ointerRegisters(SRC_ADDR/DST_ADDR)..414 ListofFiguresSPRUFB8D September2007 RevisedApril2011 SubmitDocumentationFeedback 2007 2011, (DMACTRL) (DEBUGCTRL) (REVISION) (PRIORITYCTRL1) (PRIORITYSTAT) (MODE) (CONTROL) (BURST_SIZE) (BURST_COUNT) (SRC_BURST_STEP) (DST_BURST_STEP) (TRANSFER_SIZE) (TRANSFER_COUNT) (SRC_TRANSFER_STEP) (DST_TRANSFER_STEP) (SRC/DST_WRAP_SIZE) (SCR/DST_WRAP_COUNT) (SRC/DST_WRAP_STEP) (SRC_BEG_ADDR_SHADOW/DST_BEG_ADDR_SHADOW ) (SRC_BEG_ADDR/DST_BEG_ADDR) (SRC_ADDR_SHADOW/DST_ADDR_SHADOW) (SRC_ADDR/DST_ADDR)

4 September2007 RevisedApril2011 ListofTablesSubmitDocumentationFeedback 2007 2011,TexasInstrumentsIncorporatedPreface SPRUFB8D September2007 RevisedApril2011 ReadThisFirstTheDMAmoduledescribedin thisreferenceguideis a Type0 ,28xxxDSPP eripheralReferenceGuide(SPRU566) fora listofalldeviceswitha DMAmoduleofthesametype,todeterminethedif ferencesbetweenthetypes,andfora listofdevice-specificdifferenceswithina Hexadecimalnumbersareshownwiththesuffixh orwitha ,thefollowingnumberis 40hexadecimal(decimal64):40hor0x40. Registersin thisdocumentareshownin figuresanddescribedin tables. Eachregisterfigureshowsa labeledwithitsbitname,itsbeginningandend ingbitnumbersabove, legendexplainsthenotationusedfortheprope rties.

5 Reservedbitsin a registerfiguredesignatea bitthatis SPRS439 TMS320F28335,TMS320F28334,TMS320F28332,T MS320F28235,TMS320F28234,TMS320F28232 DigitalSignalControllers(DSCs)DataManual containsthepinout,signaldescriptions,asw ellaselectricalandtimingspecificationsfo rtheF2833 TMS320F28335,F28334,F28332,TMS320F28235, F28234,F28232 DigitalSignalControllers(DSCs) 'sGuides SPRU430 TMS320C28xCPUandInstructionSetReferenceG uidedescribesthecentralprocessingunit(CP U)andtheassemblylanguageinstructionsofth eTMS320C28xfixed-pointdigitalsignalproce ssors(DSPs).It SPRU566 TMS320x28xx,28xxxDSPP eripheralReferenceGuidedescribestheperip heralreferenceguidesofthe28xdigitalsigna lprocessors(DSPs).

6 SPRUFB0 TMS320x2833x, 2823xSystemControlandInterr uptsReferenceGuidedescribesthevariousint erruptsandsystemcontrolfeaturesofthe2833 xand2823xdigitalsignalcontrollers(DSCs). SPRU812 TMS320x2833x, 2823xAnalog-to-DigitalConve rter(ADC)ReferenceGuidedescribeshowtocon figureandusetheon-chipADCmodule,whichis a TMS320x2833x, 2823xDSCE xternalInterface(XINTF)ReferenceGuidedes cribestheXINTF,whichis a nonmultiplexedasynchronousbus,asit is September2007 RevisedApril2011 SubmitDocumentationFeedback 2007 2011, TMS320x2833x, 2823xBootROMR eferenceGuidedescribesthepurposeandfeatu resofthebootloader(factory-programmedboo t-loadingsoftware) alsodescribesothercontentsofthedeviceon- chipbootROMandidentifieswherealloftheinf ormationis TMS320x2833x, 2823xMultichannelBufferedSe rialPort(McBSP)

7 DSPandotherdevicesin a TMS320x2833x, 2823xDirectMemoryAccess(DMA ) TMS320x2833x, 2823xEnhancedPulseWidthModu lator(ePWM)ModuleReferenceGuidedescribes themainareasoftheenhancedpulsewidthmodul atorthatincludedigitalmotorcontrol,switc hmodepowersupplycontrol,UPS(uninterrupti blepowersupplies), TMS320x2833x, 2823xHigh-ResolutionPulseWi dthModulator(HRPWM)ReferenceGuidedescrib estheoperationofthehigh-resolutionextens iontothepulsewidthmodulator(HRPWM).SPRUF G4 TMS320x2833x, 2823xEnhancedCapture(eCAP) TMS320x2833x, 2823xEnhancedQuadratureEnco derPulse(eQEP)ModuleReferenceGuidedescri bestheeQEPmodule,whichis usedforinterfacingwitha linearorrotaryincrementalencodertogetpos ition,direction,andspeedinformationfroma TMS320x2833x, 2823xEnhancedControllerArea Network(eCAN) TMS320x2833x, 2823xSerialCommunicationsIn terface(SCI)ReferenceGuidedescribestheSC I,whichis a two-wireasynchronousserialport,commonlyk nownasa (NRZ) TMS320x2833x, 2823xDSCS erialPeripheralInterface(SPI)ReferenceGu idedescribestheSPI- a high-speedsynchronousserialinput/output( I/O)

8 Port- thatallowsa serialbitstreamofprogrammedlength(onetos ixteenbits) TMS320x2833x, 2823xInter-IntegratedCircui t(I2C)ModuleReferenceGuidedescribesthefe aturesandoperationoftheinter-integratedc ircuit(I2C) SPRU513 'sGuidedescribestheassemblylanguagetools (assemblerandothertoolsusedtodevelopasse mblylanguagecode),assemblerdirectives,ma cros,commonobjectfileformat, TMS320C28xOptimizingC/C++ 'sGuidedescribestheTMS320C28x C/C++ ++ TMS320C28xInstructionSetSimulatorTechnic alOverviewdescribesthesimulator,availabl ewithintheCodeComposerStudioforTMS320C20 00 IDE,thatsimulatestheinstructionsetoftheC 28x TMS320C28 (API) September2007 RevisedApril2011 ReadThisFirstSubmitDocumentationFeedback 2007 2011,TexasInstrumentsIncorporatedReferen ceGuideSPRUFB8D September2007 RevisedApril2011 TMS320x2833xDirectMemoryAccess(DMA)Modul eThedirectmemoryaccess(DMA)moduleprovide sa hardwaremethodoftransferringdatabetweenp eripheralsand/ormemorywithoutinterventio nfromtheCPU, ,theDMAhasthecapabilitytoorthogonallyrea rrangethedataasit istransferredaswellas ping-pong digitalsignalcontroller(DSC)

9 Is notmeasuredpurelyin processorspeed,butin partoftheequation,anytimetheCPUbandwidth fora givenfunctioncanbereduced, significantamountoftheirbandwidthmovingd ata,whetherit is fromoff-chipmemorytoon-chipmemory,orfrom a peripheralsuchasananalog-to-digitalconve rter(ADC)toRAM, ,manytimesthisdatacomesin a formatthatis thisreferenceguidehastheabilitytofreeupC PUbandwidthandrearrangethedataintoa anevent-basedmachine,meaningit requiresa canbemadeintoa periodictime-drivenmachinebyconfiguringa timerastheinterrupttriggersource,thereis ,whileChannel1 hasoneadditionalfeature:theabilitytobeco nfiguredata a is ,alongwithotherswillbediscussedin detailin : 6 channelswithindependentPIEinterrupts Peripheralinterrupttriggersources ADCsequencer1 andsequencer2 MultichannelBufferedSerialPortA andB (McBSP-A,McBSP-B)transmitandreceive XINT1-7andXINT13 CPUT imers ePWM1-6 ADCSOCAandADSOCB signals Software Datasources/destinations: L4-L716Kx 16 SARAM AllXINTF zones ADCmemorybusmappedresultregisters McBSP-AandMcBSP-Btransmitandreceivebuffe rs ePWM1-6/ HRPWM1-6 PeripheralFrame3 mappedregisters WordSize:16-bitor32-bit(McBSPslimitedto1 6-bit) Throughput.

10 4 cycles/word(5cycles/wordforMcBSPreads)8 TMS320x2833xDirectMemoryAccess(DMA)Modul eSPRUFB8D September2007 RevisedApril2011 SubmitDocumentationFeedback 2007 2011, :TheePWM/ ,28xxxDSPP eripheralReferenceGuide(SPRU566) September2007 RevisedApril2011 TMS320x2833xDirectMemoryAccess(DMA)Modul eSubmitDocumentationFeedback 2007 2011,TexasInstrumentsIncorporatedADCRESU LT registersADCCPUPF0I/FADCDMAPF0I/FADC controlandRESULT registersADCPF2I/FL4I/FL4 SARAM(4Kx16)L5I/FL5 SARAM(4Kx16)L6I/FL6 SARAM(4Kx16)L7I/FL7 SARAM(4Kx16)PF3I/FMcBSP AMcBSP BEventtriggersDMA6-chExternalinterruptsC PUtimersCPU busDMA busPIEINT7 DINT[CH1.]