TPIC6B595 Power Logic 8-Bit Shift Register (Rev. B)

1 2 SRG89128133EN3C2RC11 DGRCKSRCLRSRCKSER IN46514716151817 DRAIN0 DRAIN1 DRAIN2 DRAIN3 DRAIN4 DRAIN5 DRAIN6 DRAIN7 SER OUT2 ProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunityTPIC6B595 SLIS032B JULY1995 REVISEDJUNE2015 TPIC6B595 PowerLogic 8-Bit Shift RegisterThestorageregistertransfersdatat o the output1 Featuresbufferwhenshift-registerclear(SR CLR)is Low rDS(on),5 (Typical)WhenSRCLRis low,the inputshiftregisteris AvalancheEnergy,30 (G) is held high,all datain the outputbuffersis heldlow and all drainoutputs EightPowerDMOST ransistorOutputsof 150-mAare off. WhenG is heldlow,datafromthe storageContinuousCurrentregisteris transparentto the OutputClampVoltage,50 Vdatain the outputbuffersis low, the DMOS-transistor Devicesare Cascadableoutputsare off. Whendatais high,the Low-PowerConsumptionserialoutput(SEROUT) allowsfor cascadingof thedatafromthe Shift registerto ApplicationsOutputsare low-side,open-drainDMOS transistors InstrumentationClusterswithoutputratings of 50 V and 150-mAcontinuous 500- LEDI lluminationand ControlsmA typicalcurrentlimit at TC= 25 C.

2 The currentlimitdecreasesas the junctiontemperatureincreasesfor AutomotiveRelayor DescriptionTheTPIC6B595is characterizedfor operationoverThe TPIC6B595deviceis a monolithic,high-voltage,the operatingcasetemperaturerangeof 40 C tomedium-currentpower8-bitshift registerdesignedfor125 in systemsthat requirerelativelyhigh load devicecontainsa built-involtageclampon theDeviceInformation(1)outputsfor (NOM)driverapplicationsincluderelays,sol enoids,andSOIC(20) (20) 8-bitserial-in,parallel-out(1) For all availablepackages,see the orderableaddendumatshiftregisterthatfeed san 8-bitD-typestoragethe end of the Shift and storageregisterson the risingedgeof the Shift -registerclock(SRCK)and the registerclock(RCK), symbolis in accordancewith ANSI/IEEEStd 91-1984and IEC IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand JULY1995 Applicationand Pin Configurationand Deviceand Mechanical,Packaging,and RevisionHistoryChangesfromRevisionA (May2005)to RevisionBPage AddedESDR atingstable,FeatureDescriptionsection,De viceFunctionalModes,ApplicationandImplem entationsection,PowerSupplyRecommendatio nssection,Layoutsection,DeviceandDocumen tationSupportsection,andMechanical,Packa ging, (July1995)to RevisionAPage 1995 2015,TexasInstrumentsIncorporatedProduct FolderLinks.

3 TPIC6B5951234567891020191817161514131211 NCVCCSER INDRAIN0 DRAIN1 DRAIN2 DRAIN3 SRCLRGGNDNCGNDSER JULY1995 REVISEDJUNE20155 Pin Configurationand FunctionsDW or N Package20-PinSOICor PDIPTop ViewNC No internalconnectionPin ,active-lowGND10, 11, 19 PowergroundNC1, 20 No internalconnectionRCK12 IRegisterclockSERIN3 ISerialdatainputSEROUT18 OSerialdataoutputSRCK15 IShiftregisterclockSRCLR8 IShiftregisterclear,active-lowVCC2 IPowersupplyCopyright 1995 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback3 ProductFolderLinks: TPIC6B595 TPIC6B595 SLIS032B JULY1995 (unlessotherwisenoted)(1)MINMAXUNITVCCL ogicsupplyvoltage(2) (3) (4)01 AIDP ulseddraincurrent,eachoutput,all outputsON, TC= 25 C(4)0500mAIDC ontinuousdraincurrent,eachoutput,all outputsON, TC= 25 C(4)0150mAIDMP eakdraincurrentsingleoutput,TC= 25 C(4)0500mAEASS ingle-pulseavalancheenergy(seeFigure11)0 30mJIASA valanchecurrent(5)0500mAContinuoustotal dissipationSeeThermalInformationTJOperat ingvirtualjunctiontemperature 40150 CTCO peratingcasetemperature 40125 CTstgStoragetemperature 65150 C(1)StressesbeyondthoselistedunderAbsolu teMaximumRatingsmay causepermanentdamageto the stressratingsonly,whichdo not implyfunctionaloperationof the deviceat theseor any otherconditionsbeyondthoseindicatedunder RecommendedOperatingConditions.

4 Exposureto absolute-maximum-ratedconditionsfor extendedperiodsmay affectdevicereliability.(2)All voltagevaluesare with respectto GND.(3)EachpowerDMOS sourceis internallyconnectedto GND.(4)Pulseduration 100 s and duty cycle 2%.(5)DRAIN supplyvoltage= 15 V, startingjunctiontemperature(TJS) = 25 C, L = H, IAS= 200 mA (seeFigure11). (HBM),per AECQ100-002(1) 2000 All pins 500V(ESD)ElectrostaticdischargeVCharged- devicemodel(CDM),per AECC ornerpins (1, 10, 20,Q100-011 75011)(1)AECQ100-002indicatesthat HBMstressingshallbe in accordancewith the ANSI/ (unlessotherwisenoted) ,TC= 25 C, VCC= 5 V, all outputson(1)(2)(see 500500mAFigure7)tsuSetuptime,SERIN high beforeSRCKM (seeFigure9)20nsthHoldtime,SERIN high afterSRCKM , (seeFigure9)20nstwPulseduration(seeFigur e9)40nsTCOperatingcasetemperature 40125 C(1)Pulseduration 100 s and duty cycle 2%.(2)Techniqueshouldlimit TJ TCto 10 C 1995 2015, JULY1995 (1)DW (SOIC)N (PDIP)UNIT20 PINS20 PINSR C/WR JC(top)Junction-to-case(top) C/WR C/W C/W C/W(1)For moreinformationabouttraditionaland new thermalmetrics,see theSemiconductorandICPackageThermalMetri csapplicationreport, (unlessotherwisenoted)PARAMETERTESTCONDI TIONSMINTYPMAXUNITD rain-to-sourcebreakdownV(BR)DSXID= 1 mA50 VvoltageSource-to-draindiodeforwardVSDIF = 100 20 A,VCC= ,SERVOHVOUTIOH= 4 mA,VCC= 20 A,VCC= ,SERVOLVOUTIOL= 4 mA,VCC= V,VI= VCC1 AIILLow-levelinputcurrentVCC= V,VI= 0 1 AAll outputsOFF20100 ICCL ogicsupplycurrentVCC= V AAll outputsON150300fSRCK= 5 MHz,CL= 30 pF,LogicsupplycurrentatICC(FRQ) outputsoff,See Figure9 and Figure2 VDS(on)= V,INNominalcurrentIN= ID,See(1)(2)(3)

5 90mATC= 85 CVDS= 40 V,VCC= AVDS= 40 VVCC= 125 CID= 100 mA, VID= 100 mA,Staticdrain-sourceON-stateSee(1)and(2 )and Figure3rDS(on)TC= 125 C, resistanceand Figure4 VCC= VID= 350 mA, V(1)Techniqueshouldlimit TJ TCto 10 C maximum.(2)Theseparametersare measuredwith voltage-sensingcontactsseparatefromthe current-carryingcontacts.(3)Nominalcurre ntis definedfor a is the currentthat producesa voltagedropof V at TC= 85 1995 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback5 ProductFolderLinks: TPIC6B595 TPIC6B595 SLIS032B JULY1995 5 V, TC= 25 CPARAMETERTESTCONDITIONSMINTYPMAXUNITP ropagationdelaytime,low-to-high-levelout putnstPLH150fromGPropagationdelaytime,hi gh-to-low-leveloutputnsCL= 30 pF, ID= 100 mA, See Figure5,tPHL90fromGFigure8 and Figure9trRisetime,drainoutput200nstfFall time,drainoutput200nstaReverse-recovery- currentrise timeIF= 100 mA, di/dt = 10 A/ s(1) (2),100nsSee Figure10trrReverse-recoverytime300(1)Tec hniqueshouldlimit TJ TCto 10 C maximum.

6 (2)Theseparametersare measuredwith voltage-sensingcontactsseparatefromthe 1995 2015,TexasInstrumentsIncorporatedProduct FolderLinks: TPIC6B595 Switching Time ns 50TC Case Temperature CID= 100 mASee Note A20015010050250300tPHLtPLHtrtf 250255075100125 Maximum Continuous Drain CurrentN Number of Outputs Conducting Simultaneouslyof Each Output ADI012345678 VCC= 5 VTC= 25 CTC= 125 100 C1084206010020030040014121618500600700ID Drain Current mAVCC= 5 VSee Note ATC= 25 CTC= 40 CTC= 125 C DS(on) Drain-to-Source On-State Resistance rVCC Logic Supply Voltage 125 CTC= 25 CTC= 40 CID= 100 mASee Note A DS(on) Static Drain-to-Source On-State Resistance rI Supply Current mACCf Frequency 5 VTC= 40 C to 125 Peak Avalanche Current AAStav Time Duration of Avalanche msTC= 25 JULY1995 PeakAvalancheCurrentvs TimeDurationofFigure2.

7 SupplyCurrentvs FrequencyAvalancheTechniqueshouldlimit TJ TCto 10 C TJ TCto 10 C StaticDrain-to-SourceOn-StateResistanceF igure3. Drain-to-SourceOn-StateResistancevs LogicSupplyVoltagevs DrainCurrentTechniqueshouldlimit TJ TCto 10 C maximumFigure6. MaximumContinuousDrainCurrentofFigure5. SwitchingTimevs CaseTemperatureEachOutputvs Numberof OutputsConductingSimultaneouslyCopyright 1995 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback7 ProductFolderLinks: TPIC6B595 Maximum Peak Drain Current of Each Output ADN Number of Outputs Conducting 5 VTC= 25 Cd = tw/tperiod= 1 ms/tperiodd = 10%d = 20%d = 50%d = 80% TPIC6B595 SLIS032B JULY1995 (continued)Figure7. MaximumPeakDrainCurrentofEachOutputvs Numberof OutputsConductingSimultaneously8 SubmitDocumentationFeedbackCopyright 1995 2015,TexasInstrumentsIncorporatedProduct FolderLinks:TPIC6B5954 7,14 17 TEST CIRCUITSWITCHING TIMESG5 V50%24 V90%10%tPLHtr50%90%10%tPHLtfSRCK5 V50%SER IN5 V50%50%tsuthtwINPUT SETUP AND HOLD WAVEFORMS5 V24 VVCCDRAINSRCLRSER INRL= 235 CL= 30 pF(see Note B)GOutputSRCKRCKDUTGNDO utputWordGenerator(see Note A)10, 11, 1981331290 V0 V0 VID2 TEST CIRCUIT5 VVCCDRAINGNDSRCLRSER INRL= 235 CL= 30 pF(see Note B)VOLTAGE WAVEFORMSGO utputSRCKRCKWordGenerator(see Note A)765432105 VSRCK5 VG5 VSER INRCKSRCLR5 V5 VDUT24 VDRAIN124 V0 V0 V0 V0 V10, 11, 1981331290 V4 7,14 JULY1995 REVISEDJUNE20157 wordgeneratorhas the followingcharacteristics:tr 10 ns, tf 10 ns, tw= 300 ns, pulsedrepetitionrate(PRR)= 5 kHz,ZO= 50.

8 Jig Resistive-LoadTestCircuitand wordgeneratorhas the followingcharacteristics:tr 10 ns, tf 10 ns, tw= 300 ns, pulsedrepetitionrate(PRR)= 5 kHz,ZO= 50 . jig TestCircuit,SwitchingTimes,and VoltageWaveformsCopyright 1995 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback9 ProductFolderLinks:TPIC6B59515 200 mHSINGLE-PULSE AVALANCHE ENERGY TEST CIRCUIT twtavIAS= AV(BR)DSX= 50 VVOLTAGE AND CURRENT WAVEFORMSI nputIDVDSSee Note BVCCDRAINSRCLRSER INGSRCKRCKWordGenerator(see Note A)DUTGND5 VVDSID2813312910, 11, 194 7,14 175 V0 AIF0 IRM25% of IRMtatrrdi/dt = 20 A/ s+ 2500 F250 VL = 1 mHIF(see Note A)RGVGG(see Note B)DriverTP A50 CircuitUnderTestDRAIN25 Vt1t3t2TP KTEST CIRCUITCURRENT WAVEFORMTPIC6B595 SLIS032B JULY1995 (continued) DRAIN terminalundertest is connectedto the TP K test otherterminalsare connectedtogetherandconnectedto the TP A test VGGamplitudeand RGare adjustedfor di/dt = 20 A/ s.

9 A VGGdouble-pulsetrainis usedto set IF= A, wheret1= 10 s, t2= 7 s, and t3= 3 Reverse-Recovery-CurrentTestCircuitand Waveformsof wordgeneratorhas the followingcharacteristics:tr 10 ns, tf 10 ns, ZO= 50 . ,tw, is increaseduntil peakcurrentIAS= levelis definedas EAS= IAS V(BR)DSX tav/2 = 30 Single-PulseAvalancheEnergyTestCircuitan d Waveforms10 SubmitDocumentationFeedbackCopyright 1995 2015,TexasInstrumentsIncorporatedProduct FolderLinks: TPIC6B595 GRCKSRCLRSRCKSER INCLRDC1DC2 CLRDC1 SER OUTCLRDC1 CLRDC1 CLRDC1 CLRDC1 CLRDC1 CLRDC1DC2DC2DC2DC2DC2DC2DC24 DRAIN05 DRAIN110, 11, JULY1995 REVISEDJUNE20158 TPIC6B595deviceis a monolithic,high-voltage,medium-currentpo wer8-bitshift registerdesignedfor usein systemsthat requirerelativelyhigh load devicecontainsa built-involtageclampon the outputsforinductivetransientprotection,s o it can alsodriverelays,solenoids,and othermedium-currentor LogicDiagram(PositiveLogic)Copyright 1995 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback11 ProductFolderLinks.

10 TPIC6B595 EQUIVALENT OF EACH INPUTTYPICAL OF ALL DRAIN OUTPUTSVCCI nputGNDGNDDRAIN50 V20 V25 V12 VTPIC6B595 SLIS032B JULY1995 (continued)Figure13. Schematicof 8-bitserial-in,parallel-outshift registerthat feedsan Shift and storageregisterson the risingedgeof the Shift registerclock(SRCK)and theregisterclock(RCK), storageregistertransfersdatato the outputbufferwhenshiftregisterclear(SRCLR )is logicallow on (SRCLR)clearsall registersin the suggestsclearingthe deviceduringpowerup outputenable(G) highholdsall datain the outputbufferslow, and all drainoutputsare off. Holding(G) low makesdatafromthe storageregistertransparentto the the outputbuffersislow, the DMOS transistoroutputsare high,the pin can also be usedfor (SEROUT)allowsfor cascadingof the datafromthe shiftregisterto device(SEROUT)pin to the nextdevice(SERIN)for applicationswhereclocksignalsmaybe skewed,devicesare not locatednearone another,orthe low-side,open-drainDMOS transistorswithoutputratingsof 50 V and 500-mAtypicalcurrentlimit at TC= 25 C.