UCC28070 300-WInterleaved PFC Pre …

1 ApplicationReportSLUA479B August2008 RevisedJuly2010 UCC28070300-WInterleavedPFCPre-Regulator DesignReviewMIchaelO' madepossiblethroughdistributingthepowero vertwointerleavedboostconvertersandthein ductorripplecurrentcancellationthatoccur swithinterleaving,reference[5].Thisappli cationnotewillreviewthedesignofa300 Wtwo-phaseinterleavedpowerfactorcorrecte d(PFC) ,reference[7].1 DesignGoalsThespecificationsforthisdesig nwerechosenbasedonthepowerrequirementsof a (VIN_MIN)(VIN_MAX)VVOUTO utputvoltage39047 HzLinefrequency63Hz(fLINE) August2008 RevisedJuly2010 UCC28070300-WInterleavedPFCPre-Regulator DesignReviewCopyright 2008 2010,TexasInstrumentsIncorporated+ VinVOUT12V to a DesignReviewSLUA479B August2008 RevisedJuly2010 Copyright 2008 2010,TexasInstrumentsIncorporatedINL1IK( D) =IDD1 2DK(D) =if D is < 05 = D--2D 1K(D) =if D is > - Duty CycleK(D)

2 = inductorripplecurrentreductionthatis showtheratioofinputripplecurrent( IIN) toindividualinductorripplecurrent( IL1) in a two-phaseinterleavedPFCasa functionofdutycycle(D).Becauseofthisindu ctorripplecurrentcancellation,thedesigne rcanalloweachinductortohavemoreinductorr ipplecurrentthanin a singlestagedesign.(1)(2)(3) (L1andL2) ( ,85V to265V RMSinput)themaximuminputripplecurrentocc ursatthepeakoflowlineandforthisdesignthe maximuminputripplecurrentwassetto30% August2008 RevisedJuly2010 UCC28070300-WInterleavedPFCPre-Regulator DesignReviewCopyright 2008 2010,TexasInstrumentsIncorporatedOUTIN_M INPLLOUTVV2390V85V 2D== V-- PLL2 1K(D ) == -OUTIN_MINPLLP2 == AVK(D) D IN_MINPLLsV2 D85V 2 = L2 ==140 HIL 200 kHz D uf22IN_MINOUTIN_MINOUTsOUTL1_RMS L2_RMS0IN_MINV2sin( ) VV2sin( )

3 PL1V12I= I=+V12pqqhp - f22L1_RMS L2_RMS085V 2sin( ) 390V 85V 2sin( )300W1140 H 200kHz390V2I= I=+2A85V - uMINMINL1 = L2 = 140 HuMAXMAXL1 = L2 = 350 HuMINMAXAVGAVGL1 + L1140 H + 350 HL1 = L2 === 245 ,variableDPLLis theconverter s (DPLL) is theratioofinputcurrenttoinductorripplecu rrentatthepeakoflowlineoperation. ILis theboostinductorripplecurrentatthepeakof lowlinebasedontheconvertersinputripplecu rrentrequirements.(4)(5)Thefollowingequa tioncanbeusedtocalculatetotalinductorRMS current(IL1_RMSandIL2_RMS).

4 (6)(7)A 140-mH to350mH.(8)(9)Theaverageinductanceis thecurrentloopcompensationsectionoftheap plicationnote:(10)4 UCC28070300-WInterleavedPFCPre-Regulator DesignReviewSLUA479B August2008 RevisedJuly2010 Copyright 2008 2010,TexasInstrumentsIncorporated()OUTLI NEOUT2222 OUTOUT2 P2 300W47 HzC=192 FV( )(390V) - -fuOUTC= 200 !FOUTRIPPLEOUTLINEOUT2 300W2 2C390V 2 2 47Hz 200 "Fhp fOUTCOUT_LFOUTP300WI== ()222 OUTOUTCOUT_HFCOUT_LFOUTIN_MINP16 VI=IV6 V2hhp -- ()222 COUT_HF300W16 390VI=( ) 390V6 85V 2p -- (COUT) is selectedbasedonholduprequirements.

5 (11)Two100-mF capacitorswereusedin parallelfortheoutputcapacitor.(12)Forthi ssizecapacitortheoutputpeaktopeakvoltage ripple(VRIPPLE) is:(13)Inadditiontoholduprequirements,a capacitormustbeselectedsothatit canwithstandboththelow-frequencyRMScurre nt(ICOUT_LF) andthehigh-frequencyRMScurrent(ICOUT_HF) . High-voltageelectrolyticcapacitorsgenera llyhavebothlowfrequency(100 Hzto120Hz)andhighfrequencyRMScurrentrati ngsontheirdatasheets.(14)(15)(16)5 SLUA479B August2008 RevisedJuly2010 UCC28070300-WInterleavedPFCPre-Regulator DesignReviewCopyright 2008 2010,TexasInstrumentsIncorporatedOUTL1 PEAKIN_MINP2I300W + =+ V22 85V D OUTIN_MINDSOUTIN_MINP300W16 V216 85V 2 =2= V22 85V 2pp -- OUTDOUTP300WI == PowerSemiconductorSelection(Q1,Q2,D1,D2) (Q1,Q2,D1,D2)TheselectionofQ1,Q2,D1, (SLUA369)

6 ,UCC28528350-WTwoPhaseInterleavedPFCPre- regulator, explainshowtoselectpowersemiconductorcom ponentsforinterleavedPFCpre-regulatorsus ingaveragecurrentmodecontroltechniques,r eference[4].Tomeetthepowerrequirementsof thisdesignIRFB11N50AN (D1,D2)andFET(Q1,Q2)peakcurrent(IPEAK) calculation:A (17)Q1andQ2 RMScurrent(IDS) calculation:(18)D1andD2 s averagecurrentcalculation(ID):(19)6 UCC28070300-WInterleavedPFCPre-Regulator DesignReviewSLUA479B August2008 RevisedJuly2010 Copyright 2008 2010, === CTN= 50 OUT 85V 2L= fML = 50R = R == WSR = k1 D1 W W.

7 PR 1 kV = IR =103VN50 W (T1,T2,DRA, DRB)6 CurrentSenseTransformersSetupandSelectio n(T1,T2,DRA, DRB)Thecurrentsensetransformeris selectedtohandleIPEAK andhavea peakcurrentsensesignal(IRS) ofroughly100mA.(20)Forthisdesigna currentsensetransformerwitha turnsratio(NCT) of50waschosenforthedesign.(21)Themagneti zinginductance(LM) ofthecurrentsensetransformershouldbesele ctedordesignedsothemagnetizingcurrentis lessthan2% (CTX16-18294) (22)(23)Selectionofthecurrentsenseresist ors(RSAandRSB) is basedonthepeakcurrentlimitsignal(VS) usedtomakethisdesignmorenoiseimmuneatlig hterloads.

8 (24)Selecta standardresistorforthedesign:(25)Resisto rRRis usedtoresetthecurrentsensetransformer:(2 6)Currentsensetransformer s rectifyingdiodes(DR) needtobedesignedtowithstandthecurrentsen setransformersresetvoltage(VR):(27)7 SLUA479B August2008 RevisedJuly2010 UCC28070300-WInterleavedPFCPre-Regulator DesignReviewCopyright 2008 2010,TexasInstrumentsIncorporatedGDAIL10 AVRSAVOFF0 VDiscontinues Current Causes False Current Sense SignalCurrentSenseTransformersSetupandSe lection(T1,T2,DRA, DRB) ,a PWMrampwitha dcoffsetis , RTB, CTA, CTB, DPA1, DPA2, DPB1, andDPB2forma PWMrampthatis DCoffsettotheCSresistors(RSAandRSB).

9 Whentheinductorcurrentbecomesdiscontinuo ustheboostinductorsringwiththeparasiticc apacitancesin in DesignReviewSLUA479B August2008 RevisedJuly2010 Copyright 2008 2010,TexasInstrumentsIncorporatedOFFV= V()()VCCOFF SAOAOBOFFVV R13V = R == WOAR= kW()()VCCsOFF DPA2 SATA TBsOFFV(V V +VR13V ( )+ =R == kV -- - W - -TATBR= R= kWTATBSAS1C = C =50 nFR3 fTAC= 47 (T1,T2,DRA, DRB)Toproperlyselecttheoffset(VOFF) justrequiresadjustingresistorsROAandROBt oadda dcoffsettothecurrentsenseresistors,thati s highenoughtoblockDRAandDRBfromconducting whena falsecurrentsensesignalsis a goodstartingpointandmayneedtobeadjustedb asedonindividualdesigncriteriaandtheamou ntofnoiseandparasiticelementspresentinth esystem.)

10 (28)(29)Selecta standardresistorforthedesign:(30)(31)Cho sea standardresistorforthedesign:(32)(33)A standardcapacitorneedstobechosenforthede sign:(34)9 SLUA479B August2008 RevisedJuly2010 UCC28070300-WInterleavedPFCPre-Regulator DesignReviewCopyright 2008 2010,TexasInstrumentsIncorporatedSPK1PK2 REFSV k!R == kVV6V 10Hz 10 HzR === k200 kHz W W WfRTR= kW()()DMXRTMAXR = R 2 D1 = k! 2 1 = 35 k - -WDMXR= kW3 ARM=WABOUTVREFR3V3M!2R == kVREF390V3VV2 W--BR = kWABOVPBR + R3M + kV = kWW WSettingUpPeakCurrentLimiting(RPK1,RPK2) (RPK1,RPK2)TheUCC28070hasanadjustablepea kcurrentlimitcomparatorthatcanbesetupbys electingRPK1andcalculatingtherequiredRPK 2.