Understanding Low Drop Out (LDO) Regulators

1 Understanding Low drop Out (LDO) Regulators Michael Day, texas instruments ABSTRACT. This paper provides a basic Understanding of the dropout performance of a low dropout linear regulator (LDO). It shows how both LDO and system parameters affect an LDO's dropout performance, as well as how operating an LDO in, or near, dropout affects other device parameters. Most importantly, this paper explains how to interpret an LDO's datasheet to determine the dropout voltage under operating conditions not specifically stated in the datasheet. I. INTRODUCTION III. Understanding LDO. Low dropout Regulators (LDOs) are a simple For standard Regulators , the pass element is inexpensive way to regulate an output voltage either a Darlington NPN or PNP output stage.

2 That is powered from a higher voltage input. They Fig. 1 shows that a Darlington transistor has a are easy to design with and use. For most high collector-to-emitter voltage drop because the applications, the parameters in an LDO datasheet gate drive voltage encounters two base-to-emitter are usually very clear and easy to understand. drops before reaching the output. Standard linear However, other applications require the designer Regulators have voltage drops as high as 2 V. to examine the datasheet more closely to which are acceptable for applications with large determine whether or not the LDO is suitable for input-to-output voltage difference such as the specific circuit conditions.

3 Unfortunately, generating V from a 5 V input. datasheets can't provide all parameters under all possible operating conditions. To the designer NPN Darlington Pass Element must interpret and extrapolate the available VIN VOUT. information to determine the performance under non-specified conditions. II. LINEAR Regulators . There are two types of linear Regulators : standard linear Regulators and low dropout linear Gate Drive Regulators (LDOs). The difference between the two is in the pass element and the amount of headroom, or dropout voltage, required to maintain a regulated output voltage. The dropout voltage is the minimum voltage required across VIN.

4 N-Channel FET Pass Element VOUT. the regulator to maintain regulation. A V. regulator that has 1 V of dropout requires the input voltage to be at least V. The input voltage minus the voltage drop across the pass element equals the output voltage. This brings up the question, What is the minimum voltage drop Gate across the pass element? The answer to this Drive question depends upon several factors. LDO pass elements. 9-1. SLUP239. A typical application such as generating For example, with the following operating V from a V Li-Ion battery requires a conditions: VIN=5 V, VOUT= V, and much lower dropout voltage (less than 300 mV). ILOAD=500 mA, the LDO pass device behaves These applications require the use of an LDO to like a resistor.

5 This equivalent resistance is achieve the lower dropout voltage. Most LDOs determined by calculating the voltage drop across use an N-channel or P-channel FET pass element the LDO and dividing by the load current: and can have dropout voltages less than 100 mV. Fig. 1 shows that the dropout voltage of an N- (5 V) A = . (1). channel FET LDO is only dependent upon the Under these specific application operating minimum voltage drop across the FET. This conditions, the LDO can be replaced by a voltage drop is a function of the RDS(on) of the .resistor with no change in output voltage or FET. current. In a practical application, however, Fig. 2 shows an LDO block diagram in its operating conditions are never static; therefore, most basic form.

6 The input voltage is applied to a feedback is necessary to change the LDO's pass element, which is typically an N-channel or effective resistance to maintain a regulated output P-channel FET, but can also be an NPN or PNP voltage. transistor. The pass element operates in the linear Fig. 3 shows the operating region of an region to drop the input voltage down to the LDO's N-channel pass element. The range of desired output voltage. The resulting output operation is limited in the x-axis by the saturation voltage is sensed by the error amplifier and region of the pass element, and limited in the y- compared to a reference voltage. The error axis by either the pass element's saturation region amplifier drives the pass element's gate to the or by the IC's programmed current limit.

7 In order appropriate operating point to ensure that the to operate properly and maintain a regulated output is at the correct voltage. As the operating output voltage, the pass element must operate current or input voltage changes, the error within the boundaries set by these two lines. In amplifier modulates the pass element to maintain the example, the drain-to-source voltage of V. a constant output voltage. Under steady state and the drain current of 500 mA set the operating operating conditions, an LDO behaves like a point at A. At this point, the LDO sets the pass simple resistor. element's gate-to-source voltage at 3 V to maintain regulation. A line drawn through the origin and point A represents the.

8 Resistance. 5V VIN VOUT V. Pass Element Error Amplifier +. Gate Load Drive +. VREF. Fig. 2. LDO block diagram. 9-2. SLUP239.. When considering a decrease in input voltage, the pass element must reduce its drain-to- source voltage to keep the output in regulation. If VIN is ine nL. LDO's Programmed reduced to 4 V, the operating point moves to C.. atio Current Limit This point represents a 1- .resistance. Note that Drain Current = Load Current - A. tur the gate-to-source voltage remained unchanged. Sa VGS = V. D C B Any further increase in current or decrease in input voltage forces the operating point onto the VGS = V. A saturation line of the pass element.

9 At this point, the LDO is said to be in dropout. The saturation line is the minimum FET drain-to- VGS = V. source resistance (RDS(on)). If the system operating conditions dictate that the LDO operate at point D , the LDO cannot reduce the drain-to- source voltage any further to stay in regulation. 0 In practice, this results in the output voltage 0 VDS = VIN - VOUT (V) falling out of regulation. The pass element now operates up and down the saturation line to Fig. 3 Operating region of an LDO's N-channel correspond with changes in input voltage, or load pass element. resistance. Note that a line drawn from the origin Consider a change to the static conditions in through the saturation line represents the FET's the example: if the load resistance decreases (an minimum RDS(on).)

10 If this were a 1A LDO, it increase in load current), the LDO must react to would have a datasheet dropout rating of 800 mV. maintain regulation. If it doesn't react, the LDO at 1 A. Note that when the LDO is operated at a has a higher voltage drop across the pass element fraction of its rated output current, its dropout which causes the output voltage to fall out of voltage is a fraction of the maximum specified regulation. The LDO must decrease the pass dropout voltage. element's resistance by increasing the gate-to- LDO datasheets can only specify the IC's source voltage on the FET. When the gate-to- dropout voltage under a limited number of source voltage increases, the operating point operating conditions.