Understanding power supply ripple ... - Texas Instruments

1 8 Analog Applications JournalAnalog and Mixed-Signal 2005 Understanding power supply ripple rejection in linear regulatorsPower supply ripple rejection ratio (PSRR) is a measure ofhow well a circuit rejects ripple coming from the inputpower supply at various frequencies and is very critical inmany RF and wireless applications. In the case of an LDO,it is a measure of the output ripple compared to the inputripple over a wide frequency range (10 Hz to 10 MHz iscommon) and is expressed in decibels (dB). The basicequation for PSRR isMore specifically, PSRR for an LDO can be written aswhere AVis the open-loop gain of the regulator feedbackloop, and AVOis the gain from VINto VOUT with the regula-tor feedback loop open.

2 From this equation it can be seenPSRRAAVVO=20 log,PSRRR ippleRippleInputOutput=20 to increase the PSRR it is beneficial to increase theopen-loop gain and decrease the gain from VINto , AVOis significantly less than 0 dB, with 10 to 15 dB being typical; this is entirely driven by internal andexternal parasitics from input to output and at the gate ofthe pass FET. Figure 1 shows a simplified regulator blockdiagram with a PMOS pass parameter that is closely related to PSRR is linetransient response. PSRR is specified at specific frequencies,whereas a line transient essentially contains all frequenciesdue to the Fourier components of a step function.

3 However,the primary difference is that PSRR is based on small signals, whereas line transients are large signals and thustheoretically much more complicated in nature. Sinceimproving PSRR typically improves line transient responseand vice versa, all of the effects on PSRR discussed in thisarticle will usually have a similar effect on the line tran-sient Instruments IncorporatedPower ManagementBy John C. Teel (Email: IC Designer, Member Group Technical StaffInputCINCNRNRRLoadR1R2 OutputCOUTPassFETE rrorAmplifier+ ReferenceFigure 1. Simplified LDO block diagramTexas Instruments IncorporatedPower Management9 Analog Applications Journal2Q and Mixed-Signal ProductsA curve showing PSRR over a wide frequency range isshown in Figure mentioned previously, the open-loop gain of the LDOfeedback circuit is the dominant factor in PSRR (at leastin a limited frequency range); therefore, LDOs requiringgood PSRR typically have high gain with a high unity-gainfrequency (large gain-bandwidth product).)

4 However, thismakes the loop more difficult to stabilize, which limits howmuch the gain-bandwidth product can be increased toimprove PSRR. It is important to have a high unity-gainfrequency so that the amplifier does not lose open-loopgain at relatively low frequencies, causing PSRR to roll off curve in Figure 2 shows that PSRR for an LDO canbe broken down into three basic frequency 1 is from dc to the roll-off frequency of thebandgap filter and is dominated by both open-loop gainand bandgap PSRR. Region 2 extends from the bandgapfilter roll-off frequency up to the unity-gain frequencywhere PSRR is dominated mainly by the open-loop gain ofthe regulator.

5 Region 3 is above the unity-gain frequency,where the feedback loop has very little effect, so the out-put capacitor dominates along with any parasitics from VINto VOUT. The gate driver s ability to drive the pass-FET gateat high frequencies also has an effect in Region 3. A largeroutput capacitor with less equivalent series resistance(ESR) will typically improve PSRR in this region, but itcan also actually decrease the PSRR at some is because increasing the output capacitor lowers theunity-gain frequency, causing the open-loop gain to roll offearlier and thus lowering PSRR. Nevertheless, the minimumPSRR that occurs at the unity-gain frequency will typicallybe affecting the gain of the feedback loop alsoaffects PSRR in Region 2.

6 One example is load current. Asload current increases, the open-loop output impedance ofthe LDO decreases (since a MOSFET s output impedanceis inversely proportional to the drain current), thus lower-ing thegain. Increasing the load current also pushes theoutput pole to higher frequencies, which increases thefeedback loop net effect of increasing theload is thereforereduced PSRR at lower frequencies(because of the reducedgain) along with increased PSRRat higher differential dc voltage between input and output isanother example of how a change in the feedback loopgain also affects PSRR. As VIN VOUTis lowered to less thanabout 1 V, the internal pass FET (which provides gain in aPMOS design) starts to be pushed out of the active (satura-tion)region of operation and into the triode/linear region,which causes the feedback loop to lose gain.

7 The dividingline between the active region and the triode region is proportional to the square root of the drain (load) as the load current is increased, the voltage across thedevice (VIN VOUT) necessary to keep it in the active regionincreases as a function of the square root of the load cur-rent. For example, having VIN VOUTat only V may haveno negative effect on PSRR at light load currents becausethe pass FET device doesn t need much headroom to stayin the active region and to preserve gain. At heavier loads,30354045505560 ripple Rejection (dB)65707580101001 k10 k100 k1 MFrequency (Hz)Region 1 Region 2 Region 3 Figure 2. PSRR curveTexas Instruments IncorporatedPower Management10 Analog Applications JournalAnalog and Mixed-Signal 2005however, V may no longer be sufficient and the passFET device may enter the triode region, causing the circuitto lose gain, thus reducing PSRR.

8 When PSRR is comparedamong various LDOs, it s important always to compareLDOs with identical VIN VOUTand ILoadconditions. It s alsoimportant to compare LDOs with identical output voltages,since PSRR is usually better at lower output of the dominant internal sources of PSRR in anLDO is the bandgap reference. Any ripple that makes itsway onto the reference will be amplified and sent to theoutput, so it s important to have a bandgap reference withhigh PSRR. Typically, the solution is simply to filter thebandgap with a low-pass filter (LPF). This LPF is almostalways accomplished with a large internal resistor and anexternal capacitor. The effect of the LPF can be seen inRegion 1 of Figure 2, where the PSRR is somewhatreduced because the LPF passes bandgap ripple in thisfrequency has been shown, there are many ways to improve thePSRR in an LDO application.

9 The most important is tostart with a low-noise, high-PSRR LDO designed for high-PSRR applications such as one from the TPS793/4/5/6xxfamily or the low-IqTPS799xx family. The next mostimportant way is to choose a low-ESR ceramic outputcapacitor and to determine the capacitance value based onthe frequencies at which PSRR is most important. Finally,board layout must be carefully done to reduce thefeedthrough from input to output via board Web partnumberwith TPS79301, TPS79401,TPS79501, TPS79601, or TPS79901 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reservethe right to make corrections, modifications, enhancements,improvements, and other changes to its products and services atany time and to discontinue any product or service without should obtain the latest relevant information beforeplacing orders and should verify that such information is currentand complete.

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