Transcription of Zynq-7000 SoC データシート 概要 - Xilinx
1 Copyright 2012-2018 Xilinx , Inc. Xilinx Xilinx Artix ISE Kintex Spartan Virtex Vivado Zynq AMBA AMBA Designer Arm Arm Cortex-A9 CoreSight Cortex PrimeCell EU Arm DS190 ( ) 2018 7 2 1 Zynq-7000 SoC Zynq -7000 SoC Arm Cortex -A9 (PS) 28nm (PL) 1 PS Arm Cortex-A9 CPU (PS)Arm Cortex-A9 (APU) CPU CPU : 1 GHz ARMv7-A TrustZone Thumb -2 Jazelle RCT NEON (VFPU) CoreSight (PTM) 3 1 2 32KB 1 4 ( ) / (CPU ) 512KB 2 8 ( CPU ) ROM 256KB RAM (OCM) DDR3/DDR3L/DDR2/LPDDR2 16 32 16 ECC 8 16 32 1GB 8 SRAM ( 64MB ) NOR NAND (1 ECC) 1 SPI 2 SPI 4 SPI ( SPI) 2 SPI (8 )
2 NOR 8 DMA I/O IEEE1588 rev 2 10/100/1000 MAC DMA 1588 rev. 2 PTP GMII RGMII SGMII 12 2 USB USB IP On-the-Go (OTG) Intel EHCI USB PHY 8 ULPI CAN 2 CAN CAN CAN ISO 118981-1 PHY SD/SDIO 2 3 2 SPI 2 UART ( 1Mb/s) 2 I2C 4 32 GPIO 54 (1 32b 22b) PSZynq-7000 SoC : DS190 ( ) 2018 7 2 Production Zynq-7000 SoC : DS190 ( ) 2018 7 2 2I/O 64 (32b 2 ) PL 54 I/O (MIO) PS PS PL Arm AMBA AXI QoS (PL) (CLB) (LUT) 36Kb RAM 72 2 18Kb RAM DSP 18 25 48 / 25 I/O LVCMOS LVDS SSTL I/O I/O SerDesJTAG PCI Express Gen2 8 16 2 12 A/D (ADC) 17 1 MSPS Zynq-7000 SoC : DS190 ( ) 2018 7 2 3 1.
3 Zynq-7000 Zynq-7000S SoC Z-7007SZ-7012SZ-7014SZ-7010Z-7015Z-7020Z -7030Z-7035Z-7045Z-7100 XC7Z007S XC7Z012S XC7Z014 SXC7Z010XC7Z015XC7Z020XC7Z030XC7Z035XC7Z 045XC7Z100 CoreSight ArmCortex-A9 MPCoreCoreSight Arm Cortex-A9 MPCore NEON / 667 MHz (-1); 766 MHz (-2)667 MHz (-1); 766 MHz (-2); 866 MHz (-3) 667 MHz (-1); 800 MHz (-2); 1 GHz (-3)667 MHz (-1); 800 MHz (-2)L1 32KB 32KB L2 512KB 256KB (1)DDR3 DDR3L DDR2 LPDDR2 (1) SPI x2 NAND NORDMA 8 (4 ) (1)UART x2 CAN x2 I2C x2 SPI x2 32b GPIO x4 DMA (1)USB (OTG) x2 x2 SD/SDIO x2 (2)RSA 256 AES SHA / ( )AXI 32 x2 AXI 32 x2 AXI 64 /32 x4 AXI 64 ACP16 7 Artix -7 FPGAA rtix-7 FPGAA rtix-7 FPGAA rtix-7 FPGAA rtix-7 FPGAA rtix-7 FPGAK intex -7 FPGAK intex-7 FPGAK intex-7 FPGAK intex-7 FPGA 23K55K65K28K74K 85K 125K275K 350K 444K (LUT)14,40034,40040,60017,60046,20053,20 078,600171,900218,600277,400 28,80068,80081,20035,20092,400106,400157 ,200343,800437,200554,800 RAM (36Kb ) (50) (72) (107) (60) (95) (140) (265) (500) (545) (755)
4 DSP (18 25 MACC)66120170801602204009009002,020 DSP ( FIR)73 GMACs131 GMACs187 GMACs100 GMACs200 GMACs276 GMACs593 GMACs1,334 GMACs1,334 GMACs2,622 GMACsPCI Express( )(3)Gen2 x4 Gen2 x4 Gen2 x4 Gen2 x8 Gen2 x8 Gen2 x8 (AMS)/XADC 17 12 1 MSPS ADC x2 (2)AES SHA 256b PL : Zynq-7000 SoC (UG585: ) 2. 3. 7 Series FPGAs Integrated Block for PCI Express LogiCORE IP (PG054: ) Zynq-7000 SoC : DS190 ( ) 2018 7 2 4 2: I/O GTP GTX (1)CLG225 CLG400 CLG484 CLG485(2) SBG485(2) 13 x 13mm17 x 17mm19 x 19mm19 x 19mm19 x 19mm ( ) PS I/O(3)SelectIOPS I/O(3)SelectIOPS I/O(3)SelectIOPS I/O(3)GTPS electIOPS I/O(3)GTXS electIOHR(4)HP(5)HR(4)HP(5)HR(4)HP(5)HR( 4)HP(5)HR(4)HP(5)XC7Z007S8454 128100 XC7Z012S1284150 XC7Z014S128125 128200 XC7Z0108454 128100 XC7Z0151284150 XC7Z020128125 128200 XC7Z030128450100XC7Z035XC7Z045XC7Z100 : 1.
5 (SBG485 No. 15 ) Z-7012S Z-7015 SBG485 Z-7030 I/O DDR High Range I/O I/O High Performance I/O I/O 3: I/O GTP GTX ( ) (1)FBG484 FBG676 FFG676 FFG900 FFG1156 23 x 23mm27 x 27mm27 x 27mm31 x 31mm35 x 35mm ( ) PS I/O(2)GTXS electIOPS I/O(2)GTXS electIOPS I/O(2)GTXS electIOPS I/O(2)GTXS electIOPS I/O(2)GTXS electIOHR(3)HP(4)HR(3)HP(4)HR(3)HP(4)HR( 3)HP(4)HR(3)HP(4)XC7Z007 SXC7Z012 SXC7Z014 SXC7Z010XC7Z015XC7Z020XC7Z03012841006312 841001501284100150XC7Z035128810015012881 0015012816212150XC7Z04512881001501288100 15012816212150XC7Z1001281621215012816250 150 : 1. (FBG FFG No. 15 ) I/O DDR High Range I/O I/O High Performance I/O I/O Zynq-7000 SoC : DS190 ( ) 2018 7 2 5 Zynq-7000 Zynq-7000 FPGA ASIC ASSP Zynq-7000 1 PS Zynq-7000 PL I/O Zynq-7000 Zynq-7000S SoC.
6 IP / LTE / / Zynq-7000 PL PS PS PL ASSP FPGA 2 I/O Zynq-7000 IP PS PL Linux Vivado Design Suite Arm PS PL IP Linux Zynq-7000 Cortex-A9 PS PL PL PS PL PL CPU ASSP Zynq-7000 SoC : DS190 ( ) 2018 7 2 6 1 Zynq-7000 Zynq-7000 SoC (UG585: ) X-Ref Target - Figure 1 1: 2x USB2x GigE2x SDZynq-7000 SoCI/OPeripherals IRQIRQEMIOS electIOResourcesDMA 8 ChannelCoreSight ComponentsProgrammable LogicDAPDevCSWDTDMASync Notes:1) Arrow direction shows control (master to slave)2) Data flows in both directions.
7 AXI 32-Bit/64-Bit, AXI 64-Bit, AXI 32-Bit, AHB 32-Bit, APB 32-Bit, Custom3) Dashed line box indicates 2nd processor in dual-core devices ACP256 KSRAMA pplication Processor UnitTTCS ystem-LevelControlRegsGigECANSDSDIOUARTG PIOUARTCANI2 CSRAM/NOR ONFI Processing SystemMemoryInterfaces Q-SPICTRL USBGigEI2 CUSB SDSDIOSPISPIP rogrammable Logic to Memory InterconnectMMUFPU and NEON EngineSnoop Controller, AWDT, TimerGIC32 KBI-Cache ARM Cortex-A9 CPUARM Cortex-A9 CPUMMUFPU and NEON EngineConfigAES/SHAXADC12-Bit ADC MemoryInterfaces 512 KB L2 Cache & ControllerOCM InterconnectDDR2/3, DDR3L,LPDDR2 Controller DS190_01_07021832 KBD-Cache 32 KBI-Cache 32 KBD-Cache MIOC lockGenerationResetCentralInterconnectGe neral-PurposePor tsHigh-Performance PortsZynq-7000 SoC : DS190 ( ) 2018 7 2 7 (PS) PS 4 ( 1) (APU) I/O (IOP) (APU)APU Arm Cortex-A9 MPCore 2 1 -Z-7007S/Z-7012S/Z-7014S ( ): 667 MHz (-1); 766 MHz (-2)-Z-7010/Z-7015/Z-7020 ( ): 667 MHz (-1); 766 MHz (-2); 866 MHz (-3)-Z-7030/Z-7035/Z-7045 ( ): 667 MHz (-1); 800 MHz (-2); 1 GHz (-3)-Z-7100 ( ): 667 MHz (-1).
8 800 MHz (-2) : NEON SIMD Thumb -2 1 ( 32KB)-4 - / 4 (MMU) TrustZone (ACP) PL CPU 2 (512KB) 8 TrustZone RAM (256KB) CPU (PL) CPU 8 DMA : 64 AXI DMA 4 PL TrustZone 2 (GIC) 3 (WDT) ( CPU 1 1 ) 2 / (TTC) CoreSight Cortex-A9 (PTM) (CTI) Zynq-7000 SoC : DS190 ( ) 2018 7 2 8 DDR3 DDR3L DDR2 LPDDR2 NAND SPI NOR DDR 8 16 32 DRAM 1GB 16 32 16 ECC PS DDR I/O PHY DDR3 1333Mb/s DDR DDR 4 AXI L2 Arm CPU 64 1 PL 64 2 AXI 64 AXI 1 8 SRAM ( 64MB ) 8 NOR ( 64MB )
9 1 ECC ONFi NAND 1 SPI 2 SPI 4 SPI ( SPI) 2 SPI (8 ) NOR I/O (IOP)IOP IOP IEEE1588 rev 2 10/100/1000 MAC DMA 1588 rev. 2 PTP PHY 12 2 USB OTG On-The-Go USB IP IP 32 AHB DMA AHB PHY 8 ULPI Intel EHCI USB CAN 2 CAN BOSCH Gmbh CAN ISO 118981-1 1 PHY SD/SDIO 2 SD/SDIO (DMA ) 3 2 SPI 2 UART 2 I2C 118 GPIO TrustZone 2 2 SDIO 2 USB ( ) IOP 54 I/O (MIO) 1 I/O 54 IOP PL PL I/O MIO HSTL LV C M O S Zynq-7000 SoC.
10 DS190 ( ) 2018 7 2 9 APU IOP Arm AMBA AXI PL / Arm CPU PL QoS (Quality of Service) QoS CPU DMA IOP PS PS PS PL 54 I/O (MIO) ( I/O ) 32 16 DDR2/DDR3/DDR3L/LPDDR2 MIO MIO PS PS PS IOP 54 4 2 MIO 54 I/O PL PL I/O I/O EMIO ( I/O) CAN 12 PS (PCW) 4: MIO MIO EMIO SPINOR/SRAMNAND USB 0 1 Yes PHY SDIO 0 1 SPI: 0 1I2C: 0 1 CAN: 0 1 GPIO CAN: PHYGPIO: 54 CAN: PHYGPIO: 64 GigE: 0 1 RGMII PHY GMII RGMII (HSTL) RGMII MII SGMII 1000 BASE-X UART: 0 1 UART.
