Transcription of Phase Locked Loop Circuits - UC Santa Barbara
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Phase Locked Loop Circuits - UC Santa Barbara
Phase Locked Loop Circuits Reading: General PLL Description: T. H. Lee, Chap. 15. Gray and Meyer, Clock generation: B. Razavi, Design of Analog CMOS Integrated Circuits , Chap. 15, McGraw-Hill, 2001. 1. Definition. A PLL is a feedback system that includes a VCO, Phase detector, and low pass filter within its loop. Its purpose is to force the VCO to replicate and track the frequency and Phase at the input when in lock. The PLL is a control system allowing one oscillator to track with another. It is possible to have a Phase offset between input and output, but when Locked , the frequencies must exactly track. )()(.)()(ttconstttinoutinout = + = The PLL output can be taken from either Vcont, the filtered (almost DC) VCO control voltage, or from the output of the VCO depending on the application.
phase or frequency can be used as the input or output variables. Of course, phase and frequency are interrelated by: Phase detector Loop filter VCO φin(t) ωin(t) φout(t) ωout(t) ve(t) Vcont out φ =φ +∫ω φ ω = t t t dt dt d t 0 ( ) (0) ( ') ' ( ) Applications: There are many applications for the PLL, but we will study: a. Clock ...
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