ECE 128 Synopsys Tutorial: Using the Design Compiler ...
'wire model' to make the wires take on realistic RLC characteristics as they would in an extracted layout. Or another example would be to apply a 'fanout' or 'fanin' to the inputs and outputs of your design as to simulate a realistic level of input or output driving. 1. The first step is to “LINK” your design, click File → Link Design
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