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Lecture 8 - Timing Constraints

Lecture 8 - Timing Constraints

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Metastability is a problem that arises when an external input NOT synchronised to the system clock is fed into our synchronous circuit. Since the input signal could change anytime relative the the clock edge, metastability will occur. It could also happens when a signal crosses from one clock domain (Clock1) to another clock domain (Clock2).

  Metastability

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