The Delay-Locked Loop
The feedback loop consists of a con-trolled delay line, a multiplier acting as a phase detector (PD), and a low-pass filter. The use of DLLs in mod-ern CMOS design evidently began with the work by Bazes in 1985 [2] and Johnson and Hudson in 1988 [3] . Basic Idea Suppose, as shown in Figure 2(a), an input clock travels on a long inter-
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