Transcription of Analog Integrated Circuit Design - Engineering
1 EE 215A HO#1 Fall 2014 Analog Integrated Circuit DesignInstructor:Behzad Razavi56-147D, Eng. IV(310) 206-1633,Email: For On-Campus Students: MSOL Students: Hours: Tue., Thur., 10:30 am - noon Handouts posted at: :TR 2:00-3:50 pmPlace:Boelter PenthousePrerequisites:Undergraduate electronics courses, , EE 115 BCredit:4 UnitsGrading:Midterm 30%Final 30%Homeworks 20% (Late HW Policy: 25% deduction per day) (Keep a copy.)
2 We are not responsible for lost homeworks. )Final Project 20% Use of laptops is not allowed during Textbook:B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, Books:P. R. Gray and R. G. Meyer,Analysis and Design of Analog Integrated Circuits, 4th Edition, 2001, A. Johns and K. Martin, Analog Integrated Circuit Design , Wiley, Dates:Thur., Oct. 9,HW#1 DueTue., Oct. 21HW#2 DueThur., Oct. 30HW#3 , Nov. 6HW#4 DueThur., Nov. 13 Midterm ExamFri. Dec. 12 Final Project DueWed. Dec. 17, 3:00-6:00 pmFinal ExamCourse Outlinel MOS Device Structure and Circuit Modelsl Single-Stage and Differential Amplifiersl Passive and Active Current MirrorslFrequency Response of AmplifierslNoiselFeedbacklOp Amp DesignlStability and Frequency Compensationl Bandgap Referencesl Introduction to Switched-Capacitor CircuitsSimulation Platform: HSPICE or Cadence.
3 The device models for technology areposted and called (for HSPICE) (for Cadence). The minimum device width is um. The source/drain area is given byW x um, and the perimeter by 2W + Cadence tutorials, # log in as:username: "ee215a 01" (there is a space between a and 0)password: "open215a"You need 8-10 hours to learn the basics of Cadence; so be patient!
