Example: quiz answers

4 x 50 W MOSFET quad bridge power amplifier

September 2013 Rev 61/181 TDA78504 x 50 W MOSFET quad bridge power amplifierFeatures High output power capability: 4 x 50 W/4 max. 4 x 30 W/4 @ V, 1 kHz, 10 % 4 x 80 W/2 max. 4 x 55 W/2 @ , 1 kHz, 10 % MOSFET output power stage Excellent 2 driving capability Hi-Fi class distortion Low output noise ST-BY function Mute function Automute at min. supply voltage detection Low external component count: Internally fixed gain (26 dB) No external compensation No bootstrap capacitors On board A high side driverProtections: Output short circuit to gnd, to Vs, across the load Very inductive loads Overrating chip temperature with soft thermal limiter Output DC offset detection Load dump voltage Fortuitous open gnd Reversed battery ESDD escriptionThe TDA7850 is a breakthrough MOSFET technology class AB audio power amplifier in Flexiwatt 25 package designed for high power car radio. The fully complementary P-Channel/N-Channel output structure allows a rail to rail output voltage swing which, combined with high output current and minimized saturation losses sets new power references in the car-radio field, with unparalleled distortion TDA7850 integrates a DC offset detector.

September 2013 Rev 6 1/18 1 TDA7850 4 x 50 W MOSFET quad bridge power amplifier Features High output power capability: 4 W–40/ 5 x max. 4 W–40/ 3 x @ 14.4 V, 1 kHz, 10 %

Information

Domain:

Source:

Link to this page:

Please notify us if you found a problem with this document:

Other abuse

Advertisement

Transcription of 4 x 50 W MOSFET quad bridge power amplifier

1 September 2013 Rev 61/181 TDA78504 x 50 W MOSFET quad bridge power amplifierFeatures High output power capability: 4 x 50 W/4 max. 4 x 30 W/4 @ V, 1 kHz, 10 % 4 x 80 W/2 max. 4 x 55 W/2 @ , 1 kHz, 10 % MOSFET output power stage Excellent 2 driving capability Hi-Fi class distortion Low output noise ST-BY function Mute function Automute at min. supply voltage detection Low external component count: Internally fixed gain (26 dB) No external compensation No bootstrap capacitors On board A high side driverProtections: Output short circuit to gnd, to Vs, across the load Very inductive loads Overrating chip temperature with soft thermal limiter Output DC offset detection Load dump voltage Fortuitous open gnd Reversed battery ESDD escriptionThe TDA7850 is a breakthrough MOSFET technology class AB audio power amplifier in Flexiwatt 25 package designed for high power car radio. The fully complementary P-Channel/N-Channel output structure allows a rail to rail output voltage swing which, combined with high output current and minimized saturation losses sets new power references in the car-radio field, with unparalleled distortion TDA7850 integrates a DC offset detector.

2 Flexiwatt25(Vertical)Flexiwatt25(Horizon tal)Table summaryOrder codePackagePackingTDA7850 Flexiwatt25 (Vertical)TubeTDA7850 HFlexiwatt25 ( Contents1 Block diagram and application circuit .. diagram .. test and application circuit .. 52 Pin description .. 63 Electrical specifications .. maximum ratings .. data .. characteristics .. characteristic curves .. 114 Application hints .. stage .. and muting .. offset detector .. definition .. 145 Package information .. 156 Revision history .. 17 TDA7850 List of tables 3/18 List of tablesTable summary .. 1 Table maximum ratings .. 7 Table data.. 7 Table characteristics .. 8 Table revision history .. 17 List of figuresTDA78504/18 List of figuresFigure diagram .. 5 Figure test and application circuit .. 5 Figure connection (top view) .. 6 Figure and top copper layer of the Figure 2.)

3 10 Figure copper layer Figure 2.. 10 Figure current vs. supply voltage .. 11 Figure power vs. supply voltage (RL = 4 ) .. 11 Figure power vs. supply voltage (RL = 2 ) .. 11 Figure vs. output power (RL = 4 ) .. 11 Figure vs. output power (RL = 2 ) .. 11 Figure vs. frequency (RL = 4 ) .. 11 Figure vs. frequency (RL = 2 ) .. 12 Figure vs. frequency .. 12 Figure voltage rejection vs. frequency .. 12 Figure attenuation vs. supply voltage.. 12 Figure dissipation and efficiency vs. output power (RL = 4 , SINE) .. 12 Figure dissipation and efficiency vs. output power (RL = 2 , SINE) .. 12 Figure dissipation vs. output power (RL = 4 , audio program simulation) .. 13 Figure dissipation vs. output power (RL = 2 , audio program simulation) .. 13 Figure R-ARM frequency response, weighting filter for transient pop.. 13 Figure (vertical) mechanical data and package dimensions .. 15 Figure (horizontal) mechanical data and package dimensions.. 16 TDA7850 Block diagram and application circuit 5/181 Block diagram and application Block diagramFigure Standard test and application circuitFigure test and application FOUT1+OUT1-OUT2+ FOUT3+OUT3-OUT4+ F47 FSVRTABS-GNDVcc1 Vcc2100nF470 FC91 FIN2C2 FOUT1 OUT2IN3C3 FIN4C4 FC647 FC72200 FC101 FST-BYR110KR3*)R247 KMUTEC11415121122413S-GND1610251 HSD/OD620987523171819212423*) R3 = 10k to be placed when pin 25 is used as offset descriptionTDA78506/18 2 Pin descriptionFigure connection (top view)

4 D94AU159 ATABP-GND2 OUT2-ST-BYOUT2+VCCOUT1-P-GND1 OUT1+SVRIN1IN2S-GNDIN4IN3AC-GNDOUT3+P-GN D3 OUT3-VCCOUT4+MUTEOUT4-P-GND4 HSD125D06AU1655 TABP-GND2 OUT2-ST-BYOUT2+VCCOUT1-P-GND1 OUT1+SVRIN1IN2S-GNDIN4IN3AC-GNDOUT3+P-GN D3 OUT3-VCCOUT4+MUTEOUT4-P-GND4 HSD125 VerticalHorizontalTDA7850 Electrical specifications 7/183 Electrical Absolute maximum ratings Thermal data Table maximum ratingsSymbolParameterValueUnitVSOperati ng supply voltage18 VVS (DC)DC supply voltage28 VVS (pk)Peak supply voltage (for t = 50 ms)50 VIOO utput peak currentrepetitive (duty cycle 10 % at f = 10 Hz)non repetitive (t = 100 s)910 AAPtotPower dissipation Tcase = 70 C80 WTjJunction temperature150 CTstgStorage temperature-55 to 150 CTable dataSymbolParameterValueUnitRth j-caseThermal resistance junction to C/WElectrical specificationsTDA78508/18 Electrical characteristics Table characteristics (Refer to the test and application diagram, VS = V; RL = 4 ; Rg = 600 ; f = 1 kHz;Tamb = 25 C; unless otherwise specified).

5 SymbolParameterTest conditionMin. currentRL = 100180280mAVOSO utput offset voltagePlay mode / Mute mode 50mVdVOSD uring mute ON/OFF output offset voltageITU R-ARM weightedsee Figure 20-10+10mVDuring Standby ON/OFF output offset voltage-10+10mVGvVoltage gain252627dBdGvChannel gain unbalance 1dBPo Output powerVS = V; THD = 10 %VS = V; THD = 1 %VS = V; THD = 10 %VS = V; THD = 1 %2316282025193023 WVS = V; THD = 10 %, 2 5055 WPo output power (1)VS = V; RL = 4 VS = V; RL = 2 5085 WTHDD istortionPo = 4 WPo = 15W; RL = 2 Output noise"A" WeightedBw = 20 Hz to 20 kHz35505070 VSVRS upply voltage rejectionf = 100 Hz; Vr = 1 Vrms5075dBfchHigh cut-off frequencyPO = W100300 KHzRiInput impedance80100120K CTCross talkf = 1 kHz PO = 4 Wf = 10 kHz PO = 4 W607060--dBISBS tandby current consumptionVST-BY = V20 AVST-BY = 0 V10 Ipin5ST-BY pin currentVST-BY = V to V 1 AVSB outStandby out threshold voltage(Amp: ON) inStandby in threshold voltage(Amp: OFF) attenuationPOref = 4 W8090dBVM outMute out threshold voltage(Amp: Play) inMute in threshold voltage(Amp: Mute) specifications 9/18 VAM inVS automute threshold(Amp: Mute)Att 80 dB; POref = 4 W(Amp: Play)Att < dB; PO = 0.

6 Pin currentVMUTE = V (Sourced Current)71218 AVMUTE = V-518 AHSD sectionVdropoutDropout voltageIO = A; VS = 9 to 16 limits400800mAOffset detector (Pin 25)VM_ONMute voltage for DC offset detection enabledVST-BY = 5 V8 VVM_OFF6 VVOFFD etected differential output offset VST-BY = 5 V; Vmute = 8 V 2 3 4VV25_TPin 25 voltage for detection = TRUEVST-BY = 5 V; Vmute = 8 VVOFF > 4 25 Voltage for detection = FA LS EVST-BY = 5 V; Vmute = 8 VVOFF > 2 V12V1. Saturated square wave characteristics (continued)(Refer to the test and application diagram, VS = V; RL = 4 ; Rg = 600 ; f = 1 kHz;Tamb = 25 C; unless otherwise specified).SymbolParameterTest conditionMin. specificationsTDA785010/18 Figure and top copper layer of the Figure copper layer Figure specifications 11 Electrical characteristic curvesFigure current vs. supply voltage Figure power vs. supply voltage (RL = 4 ) Figure power vs.

7 Supply voltage (RL = 2 ) Figure vs. output power (RL = 4 ) Figure 10. Distortion vs. output power (RL = 2 ) Figure 11. Distortion vs. frequency(RL = 4 ) AC00064Vs (V)1001101201301401501601701801902008 1012141618Vi = 0RL = Id (mA)510152025303540455055606570758089101 112131415161718Po (W)Vs (V)RL= 4 f = 1 KHzPo-maxTHD= 10%THD= 1%AC00064AC00066010203040506070809010011 012013089101112131415161718Vs (V)Po (W)Po-maxTHD=10%THD=1%RL= 2 f = 1 (W)THD (%)VS = VRL = 4 f = 1 KHzf = 10 (W)THD (%)VS = VRL = 2 f = 10 KHzf = 1 (Hz)THD (%)VS = VRL = 4 Po = 4 WElectrical specificationsTDA785012/18 Figure 12. Distortion vs. frequency(RL = 2 ) Figure 13. Crosstalk vs. frequency Figure 14. Supply voltage rejection vs. frequency Figure 15. Output attenuation vs. supply voltage Figure 16. power dissipation and efficiency vs. output power (RL = 4 , SINE) Figure 17. power dissipation and efficiency vs.

8 Output power (RL = 2 , SINE) (Hz)THD (%)VS = VRL = 2 Po = 8 W-100-90-80-70-60-50-40-30-2010100100010 000100000RL = 4 Po = 4 WRg = 600 f (Hz)CROSSTALK (dB)AC00071AC00072-100-90-80-70-60-50-40 -30-2010100100010000100000f (Hz)SVR (dB)Rg = 600 Vripple = 1 VrmsAC00073-100-80-60-40-2005678910Vs (V)OUTPUT ATTN (dB)RL = 4 Po = 4 W ref AC00074010203040506070809002468101214161 8202224262830 Ptot (W) (%)Po (W)0102030405060708090 Ptot VS = VRL = 4 x 4 f = 1 KHz SINEAC0007502040608010012014016018005101 520253035404550550102030405060708090 Ptot (W) (%)Po (W)Ptot VS = VRL = 4 x 2 f = 1 KHz SINETDA7850 Electrical specifications 13/18 Figure 18. power dissipation vs. output power (RL = 4 , audio program simulation) Figure 19. power dissipation vs. output power (RL = 2 , audio program simulation) Figure 20. ITU R-ARM frequency response, weighting filter for transient pop AC00076510152025300123456VS = VRL = 4 x 4 GAUSSIAN NOISECLIP STARTPtot (W)Po (W)AC00077510152025303540455055600246810 VS = VRL = 4 x 2 GAUSSIAN NOISECLIP STARTPtot (W)Po (W)Output attenuation (dB)-50-40-30-20-10010101001000100001000 00 HzAC00343 Application hintsTDA785014/18 4 Application hintsReferred to the circuit of Figure SVRB esides its contribution to the ripple rejection, the SVR capacitor governs the turn ON/OFF time sequence and, consequently, plays an essential role in the pop optimization during ON/OFF transients.

9 To conveniently serve both needs, Its minimum recommended value is 10 Input stageThe TDA7850's inputs are ground-compatible and can stand very high input signals ( 8 Vpk) without any performance degradation. If the standard value for the input capacitors ( F) is adopted, the low frequency cut-off will amount to 16 Standby and mutingStandby and Muting facilities are both CMOS compatible. In absence of true CMOS ports or microprocessors, a direct connection to Vs of these two pins is admissible but a 470k equivalent resistance should be present between the power supply and the muting andST-BY pins. R-C cells have always to be used in order to smooth down the transitions for preventing any audible transient noises. About the standby, the time constant to be assigned in order to obtain a virtually pop-free transition has to be slower than DC offset detectorThe TDA7850 integrates a DC offset detector to avoid that an anomalous DC offset on the inputs of the amplifier may be multiplied by the gain and result in a dangerous large offset on the outputs which may lead to speakers damage for overheating.

10 The feature is enabled by the MUTE pin (according to table 3) and works with the amplifier unmuted and with no signal on the inputs. The DC offset detection is signaled out on the HSD pin. To ensure the correct functionality of the Offset Detector it is necessary to connect a pulldown 10 kW resistor between HSD and Heatsink definitionUnder normal usage (4 Ohm speakers) the heatsink's thermal requirements have to be deduced from Figure 18, which reports the simulated power dissipation when real music/speech programmes are played out. Noise with gaussian-distributed amplitude was employed for this simulation. Based on that, frequent clipping occurrence (worst-case) will cause Pdiss = 26 W. Assuming Tamb = 70 C and TCHIP = 150 C as boundary conditions, the heatsink's thermal resistance should be approximately 2 C/W. This would avoid any thermal shutdown occurrence even after long-term and full-volume information 15/185 Package informationIn order to meet environmental requirements, ST (also) offers these devices in ECOPACK packages.


Related search queries