Low-power dual operational amplifier - st.com

1 LM2904, LM2904A. Low-power dual operational amplifier Datasheet - production data Related products See LM2904W for enhanced ESD. performances Description This circuit consists of two independent, high gain operational amplifiers (op amps) that have frequency compensation implemented internally. They are designed specifically for automotive and industrial control systems. The circuit operates from a single power supply over a wide range of voltages. The low power supply drain is independent of the magnitude of the power supply voltage. Features Application areas include transducer amplifiers, Frequency compensation implemented DC gain blocks and all the conventional op amp internally circuits which can now be more easily Large DC voltage gain: 100 dB implemented in single power supply systems. For Wide bandwidth (unity gain): MHz example, these circuits can be directly supplied (temperature compensated) from the standard 5 V which is used in logic Very low supply current/ amplifier , essentially systems and easily provides the required independent of supply voltage electronic interfaces without requiring any additional power supply.

2 Low input bias current: 20 nA (temperature compensated) In linear mode, the input common-mode voltage Low input offset current: 2 nA range includes ground and the output voltage can Input common-mode voltage range includes also swing to ground, even though operated from negative rail a single power supply. Differential input voltage range equal to the power supply voltage Large output voltage swing 0 V to +. ((VCC ) V). February 2016 DocID2471 Rev 17 1/24. This is information on a product in full production. Contents LM2904, LM2904A. Contents 1 Schematic 3. 2 Package pin 4. 3 Absolute maximum ratings and operating conditions .. 5. 4 Electrical characteristics .. 7. 5 Electrical characteristic curves .. 9. 6 Typical single-supply applications .. 12. 7 Macromodel .. 14. 8 Package information .. 15. DFN8 2x2 package information .. 16. MiniSO8 package information .. 18. TSSOP8 package information .. 19. SO8 package information .. 20. 9 Ordering 21. 10 Revision history.

3 22. 2/24 DocID2471 Rev 17. LM2904, LM2904A Schematic diagram 1 Schematic diagram Figure 1: Schematic diagram (1/2 LM2904, LM2904A). V CC. 6 A. 4 A 100 A. Q5. Q6. CC. Q2 Q3. Inverting Q7. input Q1 Q4. R SC. Non-inverting Q11. Output input Q13. Q10 Q12. Q8 Q9. 50 A. GND. DocID2471 Rev 17 3/24. Package pin connections LM2904, LM2904A. 2 Package pin connections Figure 2: DFN8 2x2 package pin connections (top view). 1. The exposed pad of the DFN8 2x2 can be connected to (VCC-) or left floating. Figure 3: MiniSO8, TSSOP8, and SO8 package pin connections (top view). 4/24 DocID2471 Rev 17. LM2904, LM2904A Absolute maximum ratings and operating conditions 3 Absolute maximum ratings and operating conditions Table 1: Absolute maximum ratings Symbol Parameter Value Unit (1). VCC Supply voltage 16 or 32. (2). Vid Differential input voltage 32 V. Vin Input voltage to 32. (3). Output short-circuit duration Infinite s (4) 5 mA in DC or 50 mA in AC, Input current : Vin driven negative Iin (duty cycle = 10 %, T = 1 s) mA.

4 (5). Input current : Vin driven positive above AMR value Toper Operating free-air temperature range -40 to 125. Tstg Storage temperature range -65 to 150 C. Tj Maximum junction temperature 150. DFN8 2x2 57. (6) MiniSO8 190. Rthja Thermal resistance junction to ambient TSSOP8 120. SO8 125 C/W. MiniSO8 39. (6). Rthjc Thermal resistance junction to case TSSOP8 37. SO8 40. (7). HBM: human body model 300. (8). V. ESD MM: machine model 200. (9). CDM: charged device model kV. Notes: (1). All voltage values, except differential voltage are with respect to network ground terminal. (2). Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. (3) +. Short-circuits from the output to VCC can cause excessive heating if (Vcc ) > 15 V. The maximum output current is approximately 40 mA, independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuits on all amplifiers. (4). This input current only exists when the voltage at any of the input leads is driven negative.

5 It is due to the collector-base junction of the input PNP transistor becoming forward-biased and thereby acting as an input diode clamp. In addition to this diode action, there is NPN parasitic action on the IC chip. This transistor action can cause the output voltages of the op amps to go to the VCC. voltage level (or to ground for a large overdrive) for the time during which an input is driven negative. This is not destructive and normal output is restored for input voltages above V. (5). The junction base/substrate of the input PNP transistor polarized in reverse must be protected by a resistor in series with the inputs to limit the input current to 400 A max (R = (Vin - 32 V)/400 A). (6). Short-circuits can cause excessive heating and destructive dissipation. Values are typical. (7). Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a k resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.

6 (8). Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating. (9). Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins. DocID2471 Rev 17 5/24. Absolute maximum ratings and operating LM2904, LM2904A. conditions Table 2: Operating conditions Symbol Parameter Value Unit VCC Supply voltage 3 to 30. +. V. Vicm Common-mode input voltage range 0 to (VCC ) - Toper Operating free-air temperature range -40 to 125 C. 6/24 DocID2471 Rev 17. LM2904, LM2904A Electrical characteristics 4 Electrical characteristics Table 3: VCC+ = 5 V, VCC- = ground, VO = V, Tamb = 25 C (unless otherwise specified). Symbol Parameter Min. Typ. Max. Unit (1).

7 Input offset voltage, Tamb = 25 C, LM2904 2 7. (1). Input offset voltage, Tamb = 25 C, LM2904A 1 2. Vio (1). mV. Input offset voltage, Tmin Tamb Tmax, LM2904 9. (1). Input offset voltage, Tmin Tamb Tmax, LM2904A 4. Vio/ T Input offset voltage drift 7 30 V/ C. Input offset current, Tamb = 25 C 2 30. Iio nA. Input offset current, Tmin Tamb Tmax 40. Iio/ T Input offset current drift 10 300 pA/ C. (2). Input bias current, Tamb = 25 C 20 150. Iib (2) nA. Input bias current, Tmin Tamb Tmax 200. +. Large signal voltage gain, VCC = 15 V, RL = 2 k , 50 100. V = V to V, Tamb = 25 C. Avd +. V/mV. Large signal voltage gain, VCC = 15 V, RL = 2 k , 25. V = V to V, Tmin Tamb Tmax Supply voltage rejection ratio (RS 10 k ), Tamb = 25 C 65 100. SVR dB. Supply voltage rejection ratio (RS 10 k ), Tmin Tamb Tmax 65. +. Supply current, all amp, no load, Tamb = 25 C, VCC = 5 V ICC +. mA. Supply current, all amp, no load, Tmin Tamb Tmax, VCC = 30 V 2. +. + (3) (VCC ) - Input common mode voltage range (VCC = 30 V), Tamb = 25 C 0.

8 Vicm V. + +. Input common mode voltage range (VCC = 30 V), Tmin Tamb Tmax 0 (VCC ) - 2. Common-mode rejection ratio (RS = 10 k ), Tamb = 25 C 70 85. CMR dB. Common-mode rejection ratio (RS = 10 k ), Tmin = Tamb = Tmax 60. +. Isource Output short-circuit current, VCC = 15 V, Vo = 2 V, Vid = 1 V 20 40 60. +. mA. Output sink current, VO = 2 V, VCC =5V 10 20. Isink +. Output sink current, VO = V, VCC = 15 V 12 50 A. +. High-level output voltage (VCC = 30 V), Tamb = 25 C, RL = 2 k 26. +. High-level output voltage (VCC = 30 V), Tmin Tamb Tmax 26 27. VOH +. V. High-level output voltage (VCC = 30 V), Tamb = 25 C, RL = 10 k 27. +. High-level output voltage (VCC = 30 V), Tmin Tamb Tmax 27 28. Low-level output voltage (RL = 10 k ), Tamb = 25 C 5 20. VOL mV. Low-level output voltage (RL = 10 k ), Tmin = Tamb = Tmax 20. +. Slew rate, VCC = 15 V, Vin = to 3 V, RL = 2 k , CL =100 pF, unity gain, Tamb = 25 C. SR +. V/ s Slew rate, VCC = 15 V, Vin = to 3 V, RL = 2 k , CL =100 pF, unity gain, Tmin = Tamb = Tmax +.

9 Gain bandwidth product, f = 100 kHz, VCC = 30 V, Vin = 10 mV, GBP MHz RL = 2 k , CL = 100 pF. DocID2471 Rev 17 7/24. Electrical characteristics LM2904, LM2904A. Symbol Parameter Min. Typ. Max. Unit Total harmonic distortion, f = 1 kHz, AV = 20 dB, RL = 2 k , THD + %. Vo = 2 Vpp, CL = 100 pF, VCC = 30 V. +. en Equivalent input noise voltage, f = 1 kHz, RS = 100 , VCC = 30 V 55 nV/ Hz (4). VO1/VO2 Channel separation, 1 kHz f 20 kHz 120 dB. Notes: (1) + +. VO = V, RS = 0 , 5 V < VCC < 30 V, 0 V < Vic < (VCC ) - V. (2). The direction of the input current is out of the IC. This current is essentially constant, independent of the state of the output, so there is no change in the loading charge on the input lines. (3). The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than V. The +. upper end of the common-mode voltage range is (VCC ) V, but either or both inputs can go to 32 V without damage. (4). Due to the proximity of external components, ensure that the stray capacitance does not cause coupling between these external parts.

10 This can typically be detected at higher frequencies because this type of capacitance increases. 8/24 DocID2471 Rev 17. LM2904, LM2904A Electrical characteristic curves 5 Electrical characteristic curves Figure 4: Open-loop frequency response Figure 5: Large signal frequency response Figure 6: Voltage follower large signal response Figure 7: Current sinking output characteristics Figure 8: Voltage follower small signal response Figure 9: Current sourcing output characteristics DocID2471 Rev 17 9/24. Electrical characteristic curves LM2904, LM2904A. Figure 10: Input current versus temperature Figure 11: Current limiting Figure 12: Input voltage range Figure 13: Supply current Figure 14: Voltage gain Figure 15: Input current versus supply voltage 10/24 DocID2471 Rev 17. LM2904, LM2904A Electrical characteristic curves Figure 16: Gain bandwidth product Figure 17: Power supply rejection ratio Figure 18: Common-mode rejection ratio Figure 19: Phase margin vs capacitive load DocID2471 Rev 17 11/24.