AN10658 Sending I2C-bus signals via long communications …

1 AN10658 Sending I2C-bus signals via long communications cablesRev. 01 26 February 2008 Application noteDocument informationInfoContentKeywordsI2C-bus, twisted pair cables, Cat5e, high speed, Fast-mode, Fast-mode Plus, Fm+, inter-IC, SDA, SCL, P82B96, PCA9600, I2C2005-1 AbstractReliable I2C-bus communication at high data rates, and over many meters, can be achieved using widely available twisted-pair communication cable ( Category 5e and similar 4-pair cables, as typically used for Ethernet communications ).The two bidirectional I2C-bus signals , SDA and SCL, are split into four unidirectional signals using P82B96 or PCA9600. Each signal is then transmitted over a separate twisted pair within the communication cable and combined again by another configuration minimizes cable propagation delays and therefore maximizes speed because transmission line reflections do not affect the signal in local ground potential between the cable ends of at least 5 V (of either polarity, or ac peak) will not affect the data levels of ESD immunity can be achieved when maximum clock speed NXP 2008.

2 All rights noteRev. 01 26 February 2008 2 of 28 Contact informationFor more information, please visit: sales office addresses, please send an email to: SemiconductorsAN10658 Sending I2C-bus signals via long communications cables Revision historyRevDateDescription0120080226 Application note; initial versionAN10658_1 NXP 2008. All rights noteRev. 01 26 February 2008 3 of 28 NXP SemiconductorsAN10658 Sending I2C-bus signals via long communications cables1. IntroductionThis document discusses the timing and signal integrity requirements to achieve reliable communications at relatively high speeds (at least 400 kHz) when it is required to send I2C-bus signals over relatively long distances (at least 100 m at lower speeds) using conventional communications cables. The cables chosen are known as Category 5e communication cables and contain four twisted pairs having a characteristic impedance around 100 .The drive capability of standard I2C-bus devices (3 mA sink) or even of Fast-mode Plus (Fm+) or I2C-bus buffers such as P82B96 or PCA9600 (30 mA) is not sufficient to drive useful logic voltages on these cables if they are terminated by their characteristic impedance at each end.

3 Working with termination resistances that must be significantly larger than the characteristic impedance of the cable means there will be significant distortion of the logic signals in the period immediately following a change in the required logic there are large distances between the ends of the connecting cable some differences in the local ground potentials can be expected and need to be 4-wire driving method shown in Figure 2 minimizes the signal distortions and guarantees each logic transition can be transmitted in the minimum possible time the simple one-way propagation delay of the cable. Figure 1 and Figure 2 show the two possible ways that P82B96 or PCA9600 can be configured to send, for example, the SCL signal when driving twisted pairs. The pull-up resistors are not shown, but their possible position and values are discussed in this note. Ty/Ry/Sy will use the same configurations to send the SDA daughter card to fit the I2C2005-1 Evaluation board and demonstrate the special signaling is described.

4 Switch options also allow it to be configured as in Figure 1 to produce Fm+ compliant bidirectional signal transmission over a twisted pair cableFig signal transmission using two twisted pairs and unidirectional signals002aad658 TxRxSxTxRxSx002aad659 TxRxSxRxTxSxAN10658_1 NXP 2008. All rights noteRev. 01 26 February 2008 4 of 28 NXP SemiconductorsAN10658 Sending I2C-bus signals via long communications Typical speed performance that can be achievedThe typical speed performance that can be achieved are:Example A: 2 PCA9600 communicating at 800 kHz over 20 m of Cat5e cable and exchanging 800 kHz, 3 mA level, I2C-bus signals with an Fm+ capable B: 2 P82B96 communicating at 400 kHz over 50 m of Cat5e twisted pair cable and exchanging 400 kHz Fast-mode I2C-bus compatible signals ( , 3 mA levels) with an Fm+ capable C: 1 P82B96 converting 3 mA I2C-bus levels to 30 mA levels and directly interfacing with an Fm+ slave at > 700 D: 1 PCA9600 converting 3 mA Fm+ I2C-bus signals to 30 mA Fm+ signals and directly interfacing with an Fm+ slave at 1 MHz.

5 (In Example B, directly replacing P82B96 by PCA9600 would achieve the same 50 m performance with slightly improved timing margins, but more importantly, PCA9600 provides guaranteed TTL level compatibility at its Sx/Sy while P82B96 is only typically compatible with TTL logic levels.)Figure 3 shows the theoretical speed limitation for the 4-signal mode, based on assuming that all components have the worst case timing performance for their class. The curve is calculated by simply adding the total system propagation delays to the allowed minimum low clock shown in the examples, when the connected parts have their typical delays, or if Fm+ parts are used in a Fast-mode system, then the speeds can be significantly higher. Cables longer than 100 m are of course possible, but the limitation with 5 V logic levels can become factors other than just propagation delays, for example attenuation due to cable losses. A = Fm+ capable parts with PCA9600B = Fast-mode capable parts with P82B96 Fig speed performance using 4-signal modecable length (m)01208040002aad6600600400200800f(kHz)A BAN10658_1 NXP 2008.

6 All rights noteRev. 01 26 February 2008 5 of 28 NXP SemiconductorsAN10658 Sending I2C-bus signals via long communications Improved immunity to ESD, noise, and ground potential differencesBecause the cable is low-impedance it is possible to fit transient protection devices having relatively large capacitance without significantly disturbing the logic signals . That enables a system to be designed with high tolerance to there are long cable runs there can be significant differences in the local equipment ground potential at each end of the cable. Generally it will be necessary to connect the logic signal ground wires to the local ground at each piece of connected equipment and this has the potential to cause currents in the ground wires and level shifting of the logic signals at the send/receive ICs. These shifts in level reduce the noise margins of the logic signals , , they reduce the margin between the actual logic voltage level and the level that will cause the signal to be recognized as the opposite logic levels shifts can also cause the voltages applied to the I/Os of the driving chips to exceed their absolute maximum ratings.

7 An important case is the application of voltages that are negative with respect to the chip s ground pin. The usual limit is around V and that will generally limit the difference in ground potentials to the arrangement described it is possible to build a system that can tolerate ground differences of at least 5 V (either polarity or peak ac value).2. The benefits of extending an I2C-busThe I2C-bus is already widely used within each separate unit of many pieces of equipment, for example in consumer electronics in TV, DVD, and STB or in the modules or racks of telecommunications and industrial makes sense to extend the use of the I2C-bus to the linking of those pieces of equipment rather than converting the I2C-bus signals to use some unrelated data transmission ability to use a conventional communications cable and its associated low cost hardware to make a robust control link between pieces of equipment makes this option even more Using the P82B96/PCA9600 board with the I2C2005-1 evaluation boardThe schematic for the P82B96/PCA9600 evaluation board is shown in Figure xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxxAN10658_1 NXP 2008.

8 All rights noteRev. 01 26 February 2008 6 of 28 NXP SemiconductorsAN10658 Sending I2C-bus signals via long communications cables Fig of P82B96/PCA9600 evaluation daughter card for I2C2005-1 evaluation board9 VCCSyRyTyJ2 SxRxTxGND12348765002aad697123456785 k k VVCCVCCIC1P82B96 SxRxSyTxTyGNDRy81743256912345678 CON3 SxSyGNDVCCVCCC1100 nFD1 AxialR3 AxialVCC12R4 VCCRxTxTyRyBZX84C15D2 BAT54AD3AR7 AxialVCCD4 AxialR8 VCCD5 BZX84C15R61 k BAT54AD3BR101 k R5150 RVCCR9150 RVCC3412345678 CON112345678 CON2 VCCVCCAN10658_1 NXP 2008. All rights noteRev. 01 26 February 2008 7 of 28 NXP SemiconductorsAN10658 Sending I2C-bus signals via long communications cables This daughter board can be configured to demonstrate two different applications : Generating an Fm+ compatible drive signal for other application boardsA single daughter board is fitted to the 9-pin expansion header of the I2C2005-1 evaluation board and can be powered from the switched 5 V supply on that I2C2005-1 evaluation board s 9-pin header signals are duplicated on the daughter board s 9-pin header CON4 to allow further expansion or connection of other daughter P82B96/PCA9600 generates Fm+ signals on the 8P8C modular (RJ45) jack CON1 that are compatible with, for example, the PCA9633 LED Demo Board Fm+ select this option it is necessary to close switches 1 and 2 on the DIP switch S1 and to open switches 3 and 4.

9 (The RJ45 jack CON2 should not be used.)The 5 V power selection jumper should be fitted between pins 2 and 3 on header input signals from the I2C2005-1 evaluation board and the corresponding Fm+ signals as delivered to the RJ45 jack CON1 are available for probing on the 8-pin header Section for further details of this application. Driving long Cat5e communication cables in 4-signal mode using two daughter boardsOne board is fitted to the 9-pin expansion header of the I2C2005-1 evaluation board and can be powered from the switched 5 V supply of that board by fitting the jumper between pins 2 and 3 on header board is configured for driving long Cat5e cables by opening switches 1 and 2 on the DIP switch S1 and closing the switches 3 and cable to be driven, fitted with standard 8P8C modular connectors (RJ45), is fitted into the RJ45 jack daughter board fitted to the 9-pin header on I2C2005-1AN10658_1 NXP 2008. All rights noteRev. 01 26 February 2008 8 of 28 NXP SemiconductorsAN10658 Sending I2C-bus signals via long communications cablesThe other end of the cable is fitted into the RJ45 jack CON2 of a second or remote P82B96/PCA9600 daughter board.

10 This remote board will derive its 5 V supply from the first board, via the cable and CON2. Use of CON2, with its different wiring configuration, provides the necessary crossover linking from Tx on one board to Rx on the that the 5 V power selection jumper is fitted between pins 2 and 3 on header J1 or that some alternative logic supply voltage is connected to pin 2 on J1 so that there is a supply voltage for the I2C-bus on the Sx/Sy side of this remote cable bus signals will be converted back to conventional I2C-bus levels by the remote P82B96/PCA9600 and both the cable bus and I2C-bus signals are available for probing on the 8-pin header J2. They are also available on the 9-pin header CON4 in the same format as on the I2C2005-1 expansion that only the switched 5 V supply from the I2C2005-1 board is used on CON1/CON2. The un-switched 5 V and V supplies are not available on the Cat5e cable and therefore are not available on CON4 in modes where boards are linked only by the Cat5e Section for further details of this Generating Fm+ compatible signals at CON1 This operating mode is intended for providing Fm+ drive signals to enable testing of ICs or modules that require up to 30mA driver sink capability to allow low resistance pull-ups to be used to achieve fast rise pull-up resistor actually fitted on the P82B96/PCA9600 demonstration board is k , being the series combinations of R5 + R6 and R9 + is made for fitting either leaded or chip resistors in parallel with this pull-up to achieve whatever resultant value is desired.