Search results with tag "Voltage derating"

Power MOSFET Avalanche Design Guidelines

instead, a voltage derating is maintained between rated BVDSS and VDD (typically 90 % or less). In such instances, however, it is not uncommon that greater than planned for voltage spikes can occur, so even the best designs may encounter an infrequent avalanche event. One such example, a flyback converter, is shown in figures 1 to 3.

  Guidelines, Design, Power, Voltage, Mosfets, Avalanche, Derating, Power mosfet avalanche design guidelines, Voltage derating