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Power MOSFET Avalanche Design Guidelines

VISHAY SILICONIX. Power mosfets Application Note AN-1005. Power MOSFET Avalanche Design Guidelines TABLE OF CONTENTS. Page Table of 2. Introduction .. 3. 3. Avalanche Mode Defined .. 3. Avalanche Occurrences in Industry 3. Flyback Converter 3. Avalanche Failure 4. Power MOSFET Device 4. Rugged 5. Avalanche Testing Details .. 7. Single Pulse Unclamped Inductive Switching .. 7. Decoupled VDD voltage 7. Avalanche Rating .. 8. EAS Thermal Limit Approach .. 8. Single Pulse Example .. 8. Repetitive 10. Buyer 12. APPLICATION NOTE. Conclusion .. 13. The purpose of this note is to better understand and utilize Power mosfets , it is important to explore the theory behind Avalanche breakdown and to understand the Design and rating of rugged mosfets .

instead, a voltage derating is maintained between rated BVDSS and VDD (typically 90 % or less). In such instances, however, it is not uncommon that greater than planned for voltage spikes can occur, so even the best designs may encounter an infrequent avalanche event. One such example, a flyback converter, is shown in figures 1 to 3.

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Transcription of Power MOSFET Avalanche Design Guidelines

1 VISHAY SILICONIX. Power mosfets Application Note AN-1005. Power MOSFET Avalanche Design Guidelines TABLE OF CONTENTS. Page Table of 2. Introduction .. 3. 3. Avalanche Mode Defined .. 3. Avalanche Occurrences in Industry 3. Flyback Converter 3. Avalanche Failure 4. Power MOSFET Device 4. Rugged 5. Avalanche Testing Details .. 7. Single Pulse Unclamped Inductive Switching .. 7. Decoupled VDD voltage 7. Avalanche Rating .. 8. EAS Thermal Limit Approach .. 8. Single Pulse Example .. 8. Repetitive 10. Buyer 12. APPLICATION NOTE. Conclusion .. 13. The purpose of this note is to better understand and utilize Power mosfets , it is important to explore the theory behind Avalanche breakdown and to understand the Design and rating of rugged mosfets .

2 Several different Avalanche ratings are explained and their usefulness and limitations in Design is considered. Revision: 06-Dec-11 1 Document Number: 90160. THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT. ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Application Note AN-1005. Vishay Siliconix Power MOSFET Avalanche Design Guidelines TABLE OF FIGURES. Page Figure 1 Flyback Converter 3. Figure 2 Flyback Converter Switch Under Avalanche Waveform .. 3. Figure 3 Flyback Converter Switch Under Avalanche Waveform (Detail) .. 3. Figure 4 Power MOSFET Cross Section.

3 4. Figure 5 Power MOSFET Circuit Model .. 4. Figure 6 Power MOSFET Cross Section Under 4. Figure 7 Basic Power MOSFET Cell Structure .. 5. Figure 8 Power MOSFET Random Device Failure Spots .. 5. Figure 9 Good Source Contact vs. Bad Source Contact Illustration .. 6. Figure 10 IA at Failure vs. Test Temperature .. 6. Figure 11 Single Pulse Unclamped Inductive Switching Test 7. Figure 12 Single Pulse Unclamped Inductive Switching Test Circuit Output Waveforms .. 7. Figure 13 Decoupled VDD voltage Source Test Circuit Model .. 7. Figure 14 Decoupled VDD voltage Source Test Circuit Waveforms .. 7. Figure 15 Typical Simulated Avalanche Waveforms.

4 8. Figure 16 IRFP450, SiHFP450 (500 V Rated) Device Avalanche Waveforms .. 8. Figure 17 IRFP32N50K, SiHFP32N50K Datasheet Excerptions .. 8. Figure 18 Transient Thermal Impedance Plot, Junction-to-Case .. 9. Figure 19 Maximum Avalanche Energy vs. Temperature for Various Drain Currents .. 9. Figure 20 EAR vs. Tstart for Various Duty Cycles, Single ID .. 10. Figure 21 Typical Avalanche Current vs. Pulsewidth for Various Duty 11. Figure 22 Specification of 40 V/14 A MOSFET Datasheet Excerptions .. 11. APPLICATION NOTE. Figure 23 Typical Effective Transient Thermal Impedance, Junction-to-Ambient .. 12. Revision: 06-Dec-11 2 Document Number: 90160.

5 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT. ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Application Note AN-1005. Vishay Siliconix Power MOSFET Avalanche Design Guidelines INTRODUCTION. Overview To better understand and utilize Power mosfets , it is VDS. important to explore the theory behind Avalanche breakdown and to understand the Design and rating of rugged mosfets . Several different Avalanche ratings are explained and their usefulness and limitations in Design is considered. Avalanche Mode Defined All semiconductor devices are rated for a certain max.

6 Reverse voltage (BVDSS for Power mosfets ). Operation VGS ID. above this threshold will cause high electric fields in reversed biased p-n junctions. Due to impact ionization, the high electric fields create electron-hole pairs that undergo a multiplication effect leading to increased current. The reverse current flow through the device causes high Power dissipation, associated temperature rise, and potential device destruction. Fig. 2 - Flyback Converter Switch Under Avalanche Waveform Avalanche Occurrences In Industry Applications Flyback Converter Circuit Some designers do not allow for Avalanche operation; Avalanche Operation instead, a voltage derating is maintained between rated BVDSS and VDD (typically 90 % or less).

7 In such instances, however, it is not uncommon that greater than planned for voltage spikes can occur, so even the best designs may VDS. encounter an infrequent Avalanche event. One such VGS. example, a flyback converter, is shown in figures 1 to 3. ID. L leakage Fig. 3 - Flyback Converter Switch Under Avalanche Waveform (Detail). Note Red (VDS), Blue (ID), Black (VGS). APPLICATION NOTE. In this application, built in Avalanche capability is an additional Power MOSFET feature and safeguards against unexpected voltage over-stresses that may occur at the Fig. 1 - Flyback Converter Circuit limits of circuit operation.

8 During MOSFET operation of the flyback converter, energy is stored in the leakage inductor. If the inductor is not properly clamped, during MOSFET turnoff the leakage inductance discharges through the primary switch and may cause Avalanche operation as shown in the VDS, ID, and VGS. vs. time waveforms in figures 2 and 3. Revision: 06-Dec-11 3 Document Number: 90160. THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT. ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT Application Note AN-1005. Vishay Siliconix Power MOSFET Avalanche Design Guidelines Avalanche FAILURE MODE.

9 Some Power semiconductor devices are designed to In Avalanche , the p-n junction acting as a diode no longer withstand a certain amount of Avalanche current for a limited blocks voltage . With higher applied voltage a critical field is time and can, therefore, be Avalanche rated. Others will fail reached where impact ionization tends to infinity and carrier very quickly after the onset of Avalanche . The difference in concentration increases due to Avalanche multiplication. performance stems from particular device physics, Design , Due to the radial field component, the electric field inside the and manufacturing.

10 Device is most intense at the point where the junction bends. This strong electric field causes maximum current flow in Power MOSFET Device Physics close proximity to the parasitic BJT, as depicted in figure 6. All semiconductor devices contain parasitic components below. The Power dissipation increases temperature, thus intrinsic to the physical Design of the device. In Power increasing RB, since silicon resistivity increases with mosfets , these components include capacitors due to temperature. From Ohm's Law we know that increasing displaced charge in the junction between p and n regions, resistance at constant current creates an increasing voltage resistors associated with material resistivity, a body diode drop across the resistor.


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