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16-Bit Digital Signal Controllers for Digital Power ...

2013-2017 Microchip Technology 1dsPIC33 EPXXGS50X FAMILYO perating Conditions to , -40 C to +85 C, DC to 70 MIPS to , -40 C to +125 C, DC to 60 MIPSF lash Architecture Dual Partition Flash Program Memory with Live Update (64-Kbyte devices):- Supports programming while operating- Supports partition soft swapCore: 16-Bit dsPIC33E CPU Code-Efficient (C and Assembly) Architecture Two 40-Bit Wide Accumulators Single-Cycle (MAC/MPY) with Dual Data Fetch Single-Cycle Mixed-Sign MUL Plus Hardware Divide 32-Bit Multiply Support Two Additional Working Register Sets (reduces context switching)Clock Management Internal Oscillator Programmable PLLs and Oscillator Clock Sources Fail-Safe Clock Monitor (FSCM) Independent Watchdog Timer (WDT) Fast Wake-up and Start-upPower Management Low- Power Management modes (Sleep, Idle, Doze) Integrated Power -on Reset and Brown-out Reset mA/MHz Dynamic Current (typical) 10 A IPD Current (typical)High-Speed PWM Five PWM Generators (two outputs per generator)

dsPIC33EPXXGS50X FAMILY DS70005127D-page 4 2013-2017 Microchip Technology Inc. Pin Diagrams (Continued) Legend: Shaded pins are up to 5 VDC tolerant. RPn represents remappable peripheral functions. See Table 10-1 and Table 10-2 for the complete list of remappable sources.

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Transcription of 16-Bit Digital Signal Controllers for Digital Power ...

1 2013-2017 Microchip Technology 1dsPIC33 EPXXGS50X FAMILYO perating Conditions to , -40 C to +85 C, DC to 70 MIPS to , -40 C to +125 C, DC to 60 MIPSF lash Architecture Dual Partition Flash Program Memory with Live Update (64-Kbyte devices):- Supports programming while operating- Supports partition soft swapCore: 16-Bit dsPIC33E CPU Code-Efficient (C and Assembly) Architecture Two 40-Bit Wide Accumulators Single-Cycle (MAC/MPY) with Dual Data Fetch Single-Cycle Mixed-Sign MUL Plus Hardware Divide 32-Bit Multiply Support Two Additional Working Register Sets (reduces context switching)Clock Management Internal Oscillator Programmable PLLs and Oscillator Clock Sources Fail-Safe Clock Monitor (FSCM) Independent Watchdog Timer (WDT) Fast Wake-up and Start-upPower Management Low- Power Management modes (Sleep, Idle, Doze) Integrated Power -on Reset and Brown-out Reset mA/MHz Dynamic Current (typical) 10 A IPD Current (typical)High-Speed PWM Five PWM Generators (two outputs per generator)

2 Individual Time Base and Duty Cycle for each PWM ns PWM Resolution (frequency, duty cycle, dead time and phase) Supports Center-Aligned, Redundant, Complementary and True Independent Output modes Independent Fault and Current-Limit Inputs Output Override Control PWM Support for AC/DC, DC/DC, Inverters, PFC and LightingAdvanced Analog Features High-Speed ADC module:- 12-bit with 4 dedicated SAR ADC cores and one shared SAR ADC core- Configurable resolution (up to 12-bit) for each ADC core- Up to Msps conversion rate per channel at 12-bit resolution- 12 to 22 single-ended inputs- Dedicated result buffer for each analog channel- Flexible and independent ADC trigger sources- Two Digital comparators- Two oversampling filters for increased resolution Four Rail-to-Rail Comparators with Hysteresis:- Dedicated 12-bit Digital -to-Analog Converter (DAC) for each analog comparator- Up to two DAC reference outputs- Up to two external reference inputs Two Programmable Gain Amplifiers.

3 - Single-ended or independent ground reference- Five selectable gains (4x, 8x, 16x, 32x and 64x)- 40 MHz gain bandwidthInterconnected SMPS Peripherals Reduces CPU Interaction to Improve Performance Flexible PWM Trigger Options for ADC Conversions High-Speed Comparator Truncates PWM (15 ns typical):- Supports Cycle-by-Cycle Current mode control- Current Reset mode (variable frequency)Timers/Output Compare/Input Capture Five 16-Bit and up to Two 32-Bit Timers/Counters Four Output Compare (OC) modules, Configurable as Timers/Counters Four Input Capture (IC) modules16-Bit Digital Signal Controllers for Digital Power Applications with Interconnected High-Speed PWM, ADC, PGA and ComparatorsdsPIC33 EPXXGS50X FAMILYDS70005127D-page 2 2013-2017 Microchip Technology Interfaces Two UART modules (15 Mbps):- Supports LIN/J2602 protocols and IrDA Two 4-Wire SPI modules (15 Mbps) Two I2C modules (up to 1 Mbaud) with SMBus SupportInput/Output Constant-Current Source (10 A nominal) Sink/Source up to 12mA/15mA, respectively.

4 Pin-Specific for Standard VOH/VOL 5V Tolerant Pins Selectable, Open-Drain Pull-ups and Pull-Downs External Interrupts on All I/O Pins Peripheral Pin Select (PPS) to allow Function Remap with Six Virtual I/OsQualification and Class B Support AEC-Q100 REVG (Grade 1, -40 C to +125 C) Class B Safety Library, IEC 60730 The mm UQFN Package is Designed and Optimized to ease IPC9592B 2nd Level Temperature Cycle QualificationDebugger Development Support In-Circuit and In-Application Programming Five Program and Three Complex Data Breakpoints IEEE Compatible (JTAG) Boundary Scan Trace and Run-Time Watch DevicePinsProgram Memory BytesRAM (Bytes) General Purpose I/O (GPIO)Remappable PeripheralsI2C12-BitADCPGAA nalog ComparatorDAC OutputConstant-Current SourcePackagesTimers(1)Input CaptureOutput CompareUARTSPIPWM(2)External Interrupts(3)Reference Clock Analog InputsS&H CircuitsdsPIC33EP16GS5022816K2K21544225x 2 3121252411 SOIC,QFN-S,UQFNdsPIC33EP32GS5022832K4K21 544225x2 3121252411dsPIC33EP64GS5022864K8K2154422 5x2 3121252411dsPIC33EP16GS5044416K2K3554422 5x2 3121952411 QFN,TQFPdsPIC33EP32GS5044432K4K35544225x 2 3121952411dsPIC33EP64GS5044464K8K3554422 5x2 3121952411dsPIC33EP16GS5054816K2K3554422 5x2 3121952411 TQFPdsPIC33EP32GS5054832K4K35544225x2 3121952411dsPIC33EP64GS5054864K8K3554422 5x2 3121952411dsPIC33EP16GS5066416K2K5354422 5x2 4122252421 TQFPdsPIC33EP32GS5066432K4K53544225x2 4122252421dsPIC33EP64GS5066464K8K5354422 5x2 4122252421 Note 1:The external clock for Timer1, Timer2 and Timer3 is.

5 PWM4 and PWM5 are remappable on all devices except the 64-pin :External interrupts, INT0 and INT4, are not remappable. 2013-2017 Microchip Technology 3dsPIC33 EPXXGS50X FAMILYPin Diagrams28-Pin SOICMCLRAVDDRA0 AVSSRA1RA3RA2RA4RB0RB14RB9RB13RB10RB12RB 11RB1 VCAPRB2 VSSRB3RB7RB4RB6 VDDRB5RB8RB15 VSSdsPIC33 EPXXGS5021234567891011121314282726252423 2221201918171615 Legend: Shaded pins are up to 5 VDC tolerant. RPn represents remappable peripheral functions. See Table 10-1 and Ta b l e 1 0 - 2 for the complete list of remappable FunctionPinPin Function1 MCLR15 PGEC3/SCL2/RP47/RB152AN0/PGA1P1/CMP1A/RA 016 TDO/AN19/PGA2N2/RP37/RB53AN1/PGA1P2/PGA2 P1/CMP1B/RA117 PGED1/TDI/AN20/SCL1/RP38/RB64AN2/PGA1P3/ PGA2P2/CMP1C/CMP2A/RA218 PGEC1/AN21/SDA1/RP39/RB75AN3/PGA2P3/CMP1 D/CMP2B/RP32/RB019 VSS6AN4/CMP2C/CMP3A/ISRC4/RP41/RB920 VCAP7AN5/CMP2D/CMP3B/ISRC3/RP42/RB1021 TMS/PWM3H/RP43/RB118 Vss22 TCK/PWM3L/RP44/RB129 OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1 23 PWM2H/RP45/RB1310 OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB 224 PWM2L/RP46/RB1411 PGED2/AN18/DACOUT1/INT0/RP35/RB325 PWM1H/RA412 PGEC2/ADTRG31/EXTREF1/RP36/RB426 PWM1L/RA313 VDD27 AVSS14 PGED3/SDA2/FLT31/RP40/RB828 AVDDdsPIC33 EPXXGS50X FAMILYDS70005127D-page 4 2013-2017 Microchip Technology Diagrams (Continued)

6 Legend: Shaded pins are up to 5 VDC tolerant. RPn represents remappable peripheral functions. See Table 10-1 and Ta b l e 1 0 - 2 for the complete list of remappable FunctionPinPin Function1AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/R A215 PGEC1/AN21/SDA1/RP39/RB72AN3/PGA2P3/CMP1 D/CMP2B/RP32/RB016 VSS3AN4/CMP2C/CMP3A/ISRC4/RP41/RB917 VCAP4AN5/CMP2D/CMP3B/ISRC3/RP42/RB1018 TMS/PWM3H/RP43/RB115 Vss19 TCK/PWM3L/RP44/RB126 OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1 20 PWM2H/RP45/RB137 OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB 221 PWM2L/RP46/RB148 PGED2/AN18/DACOUT1/INT0/RP35/RB322 PWM1H/RA49 PGEC2/ADTRG31/EXTREF1/RP36/RB423 PWM1L/RA310 VDD24 AVSS11 PGED3/SDA2/FLT31/RP40/RB825 AVDD12 PGEC3/SCL2/RP47/RB1526 MCLR13 TDO/AN19/PGA2N2/RP37/RB527AN0/PGA1P1/CMP 1A/RA014 PGED1/TDI/AN20/SCL1/RP38/RB628AN1/PGA1P2 /PGA2P1/CMP1B/RA128-Pin QFN-S.

7 UQFN212019181716151234567241110982526282 22313122714dsPIC33 EPXXGS502RB6RB5RB15RB8 VDDRB4RB3RB14RB13RB12RB11 VCAPVSSRB7RA4RA3 AVSSAVDDMCLRRA0RA1RA2RB0 VSSRB1RB2RB9RB10 2013-2017 Microchip Technology 5dsPIC33 EPXXGS50X FAMILYPin Diagrams (Continued)dsPIC33 EPXXGS50444-Pin QFN4412112324252627282930313233131415161 7181920212210987654321434241403938373635 34RA2RB0RB9RB10RC9RC10 VDDVSSRC1RB1RB2RB6RB5RB15RB8 VDDVSSRC8RC7RC2RB4RB3RB14RB13RB12RB11 VCAPVSS RC3RC6RC5RC4RB7RA4RA3RC0RC13 AVSSAVDDMCLRRC11RC12RA0RA1 Legend: Shaded pins are up to 5 VDC tolerant. RPn represents remappable peripheral functions. See Ta b l e 1 0 - 1 and Table 10-2 for the complete list of remappable FunctionPinPin Function1 PGEC1/AN21/SDA1/RP39/RB723AN2/PGA1P3/PGA 2P2/CMP1C/CMP2A/RA22AN1 ALT/RP52/RC424AN3/PGA2P3/CMP1D/CMP2B/RP3 2/RB03AN0 ALT/RP53/RC525AN4/CMP2C/CMP3A/ISRC4/RP41 /RB94AN17/RP54/RC626AN5/CMP2D/CMP3B/ISRC 3/RP42/RB105RP51/RC327AN11/PGA1N3/RP57/R C96 VSS28AN10/PGA1P4/EXTREF2/RP58/RC107 VCAP29 VDD8 TMS/PWM3H/RP43/RB1130 VSS9 TCK/PWM3L/RP44/RB1231AN8/PGA2P4/CMP4C/RP 49/RC110 PWM2H/RP45/RB1332 OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1 11 PWM2L/RP46/RB1433 OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB 212 PWM1H/RA434 PGED2/AN18/DACOUT1/INT0/RP35/RB313 PWM1L/RA335 PGEC2/ADTRG31/RP36/RB414 FLT12/RP48/RC036AN9/CMP4D/EXTREF1/RP50 /RC215 FLT11/RP61/RC1337 ASDA1/RP55/RC716 AVSS38 ASCL1/RP56/RC817 AVDD39 VSS18 MCLR40

8 VDD19AN12/ISRC1/RP59/RC1141 PGED3/SDA2/FLT31/RP40/RB820AN14/PGA2N3/R P60/RC1242 PGEC3/SCL2/RP47/RB1521AN0/PGA1P1/CMP1A/R A043 TDO/AN19/PGA2N2/RP37/RB522AN1/PGA1P2/PGA 2P1/CMP1B/RA144 PGED1/TDI/AN20/SCL1/RP38/RB6dsPIC33 EPXXGS50X FAMILYDS70005127D-page 6 2013-2017 Microchip Technology Diagrams (Continued)44-Pin TQFP RA2RB0RB9RB10RC9RC10 VDDVSSRC1RB1RB2RB6RB5RB15RB8 VDDVSSRC8RC7RC2RB4RB3RB14RB13RB12RB11 VCAPVSSRC3RC6RC5RC4RB7RA4RA3RC0RC13 AVSSAVDDMCLRRC11RC12RA0RA1 Legend: Shaded pins are up to 5 VDC tolerant. RPn represents remappable peripheral functions. See Ta b l e 1 0 - 1 and Table 10-2 for the complete list of remappable FunctionPinPin Function1 PGEC1/AN21/SDA1/RP39/RB723AN2/PGA1P3/PGA 2P2/CMP1C/CMP2A/RA22AN1 ALT/RP52/RC424AN3/PGA2P3/CMP1D/CMP2B/RP3 2/RB03AN0 ALT/RP53/RC525AN4/CMP2C/CMP3A/ISRC4/RP41 /RB94AN17/RP54/RC626AN5/CMP2D/CMP3B/ISRC 3/RP42/RB105RP51/RC327AN11/PGA1N3/RP57/R C96 VSS28AN10/PGA1P4/EXTREF2/RP58/RC107 VCAP29 VDD8 TMS/PWM3H/RP43/RB1130 VSS9 TCK/PWM3L/RP44/RB1231AN8/PGA2P4/CMP4C/RP 49/RC110 PWM2H/RP45/RB1332 OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1 11 PWM2 L/RP46/RB1433 OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB 212 PWM1H/RA434 PGED2/AN18/DACOUT1/INT0/RP35/RB313 PWM1L/RA335 PGEC2/ADTRG31/RP36/RB414 FLT12/RP48/RC036AN9/CMP4D/EXTREF1/RP50 /RC215 FLT11/RP61/RC1337 ASDA1/RP55/RC716 AVSS38 ASCL1/RP56/RC817 AVDD39 VSS18 MCLR40

9 VDD19AN12/ISRC1/RP59/RC1141 PGED3/SDA2/FLT31/RP40/RB820AN14/PGA2N3/R P60/RC1242 PGEC3/SCL2/RP47/RB1521AN0/PGA1P1/CMP1A/R A043 TDO/AN19/PGA2N2/RP37/RB522AN1/PGA1P2/PGA 2P1/CMP1B/RA144 PGED1/TDI/AN20/SCL1/RP38/RB6444342414039 38373635341332 323 314305 296 287278 269 25102411231213141516171819202122dsPIC33 EPXXGS504 2013-2017 Microchip Technology 7dsPIC33 EPXXGS50X FAMILYPin Diagrams (Continued)48-Pin TQFP Legend: Shaded pins are up to 5 VDC tolerant. RPn represents remappable peripheral functions. See Ta b l e 1 0 - 1 and Table 10-2 for the complete list of remappable FunctionPinPin Function1 PGEC1/AN21/SDA1/RP39/RB725AN2/PGA1P3/PGA 2P2/CMP1C/CMP2A/RA22AN1 ALT/RP52/RC426AN3/PGA2P3/CMP1D/CMP2B/RP3 2/RB03AN0 ALT/RP53/RC527AN4/CMP2C/CMP3A/ISRC4/RP41 /RB94AN17/RP54/RC628AN5/CMP2D/CMP3B/ISRC 3/RP42/RB105RP51/RC329AN11/PGA1N3/RP57/R C96 VSS30AN10/PGA1P4/EXTREF2/RP58/RC107 VCAP31 VDD8N/C32 VSS9 TMS/PWM3H/RP43/RB1133N/C10 TCK/PWM3L/RP44/RB1234AN8/PGA2P4/CMP4C/RP 49/RC111 PWM2 H/RP45/RB1335 OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1 12 PWM2L/RP46/RB1436 OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB 213 PWM1H/RA437 PGED2/AN18/DACOUT1/INT0/RP35/RB314 PWM1L/RA338 PGEC2/ADTRG31/RP36/RB415 FLT12/RP48/RC039AN9/CMP4D/EXTREF1/RP50 /RC216 FLT11/RP61/RC1340 ASDA1/RP55/RC717N/C41 ASCL1/RP56/RC818 AVSS42 VSS19 AVDD43 VDD20

10 MCLR44N/C21AN12/ISRC1/RP59/RC1145 PGED3/SDA2/FLT31/RP40/RB822AN14/PGA2N3/R P60/RC1246 PGEC3/SCL2/RP47/RB1523AN0/PGA1P1/CMP1A/R A047 TDO/AN19/PGA2N2/RP37/RB524AN1/PGA1P2/PGA 2P1/CMP1B/RA148 PGED1/TDI/AN20/SCL1/RP38/RB6101123456119 2021222313141516418747464544434217183132 33343525262728293039373894012243648RB7RC 4RC5RC6RC3 VSSVCAPN/CRB11RB12RB13RB14RA4RA3RC0RC13 AVSSN/CAVDDMCLRRC11RC12RA0RA1RB2RB1RC1N/ CVssVDDRC10RC9RB10RB9RB0RA2RB6RB5RB15RB8 N/CVDDVSSRC8RC7RC2RB4RB3dsPIC33 EPXXGS505dsPIC33 EPXXGS50X FAMILYDS70005127D-page 8 2013-2017 Microchip Technology Diagrams (Continued)64636261605958575655545352515 0491482473464455446437428419401039113812 3713361435153416331718192021222324252627 282930313264-Pin TQFPRC3RD1RB14RB13 VCAPRB11RD15RB12RB7RC4 VDDRD4RC5RD6RD5RC6RB9RB10 AVDDAVSSRD7RD13RC9RC10 VSSVDDRC1RB1RB3RC15RD2RD3RA4RA3RC0RC13RD 10 MCLRVSSVDDRA0RA1RA2RB0RD12RC11RC12RB6RD0 RB5RD11RB8RD8 VssRD9RD14 VDDRC8RC2RC14RB4RC7RB15RB2dsPIC33 EPXXGS506 Legend: Shaded pins are up to 5 VDC tolerant.


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