23A256/23K256 Data Sheet - Microchip Technology

1 23A256/23K256 . 256K SPI Bus Low-Power Serial SRAM. Device Selection Table Part Number VCC Range Page Size temp . Ranges Packages 23k256 32 Byte I, E P, SN, ST. 23a256 32 Byte I P, SN, ST. Features: Description: Max. Clock 20 MHz The Microchip Technology Inc. 23X256 are 256 Kbit Low-Power CMOS Technology : Serial SRAM devices. The memory is accessed via a - Read Current: 3 mA at 1 MHz simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input - Standby Current: 4 A Max. at +85 C. (SCK) plus separate data in (SI) and data out (SO). 32,768 x 8-bit Organization lines. Access to the device is controlled through a Chip 32-Byte Page Select (CS) input. HOLD pin Communication to the device can be paused via the Flexible Operating modes: hold pin (HOLD). While the device is paused, - Byte read and write transitions on its inputs will be ignored, with the - Page mode (32 Byte Page) exception of Chip Select, allowing the host to service higher priority interrupts.

2 - Sequential mode Sequential Read/Write The 23X256 is available in standard packages including 8-lead PDIP and SOIC, and advanced High Reliability packaging including 8-lead TSSOP. Temperature Ranges Supported: - Industrial (I): -40 C to +85 C. -40 C to +125 C. Package Types (not to scale). - Automotive (E): Pb-Free and RoHS Compliant, Halogen Free Pin Function Table Name Function PDIP/SOIC/TSSOP. CS Chip Select Input (P, SN, ST). SO Serial Data Output VSS Ground CS 1 8 VCC. SI Serial Data Input SO 2 7 HOLD. SCK Serial Clock Input NC 3 6 SCK. HOLD Hold Input VCC Supply Voltage VSS 4 5 SI. 2008-2011 Microchip Technology Inc. DS22100F-page 1. 23A256/23K256 . ELECTRICAL CHARACTERISTICS. Absolute Maximum Ratings ( ). VCC .. All inputs and outputs VSS .. to VCC + Storage temperature ..-65 C to 150 C. Ambient temperature under bias ..-40 C to 125 C. ESD protection on all pins ..2kV. NOTICE: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device.

3 This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an extended period of time may affect device reliability. TABLE 1-1: DC CHARACTERISTICS. Industrial (I): TA = -40 C to +85 C. DC CHARACTERISTICS. Automotive (E): TA = -40 C to +125 C. Param. Sym. Characteristic Min. Typ(1) Max. Units Test Conditions No. D001 VCC Supply voltage V 23a256 (I- temp ). D001 VCC Supply voltage V 23k256 (I,E- temp ). D002 VIH High-level input .7 VCC VCC + V. voltage D003 VIL Low-level input V. voltage V 23k256 (E- temp ). D004 VOL Low-level output V IOL = 1 mA. voltage D005 VOH High-level output VCC V IOH = -400 A. voltage D006 ILI Input leakage A CS = VCC, VIN = VSS OR VCC. current D007 ILO Output leakage A CS = VCC, VOUT = VSS OR VCC. current D008 ICC Read 3 mA FCLK = 1 MHz; SO = O.

4 6 mA FCLK = 10 MHz; SO = O. Operating current 10 mA FCLK = 20 MHz; SO = O. D009 ICCS 1 A CS = VCC = , Inputs tied to VCC. Standby current or VSS. 1 4 A CS = VCC = , Inputs tied to VCC. or VSS. 5 10 A CS = VCC = , Inputs tied to VCC. or VSS @ 125 C. D010 CINT Input capacitance 7 pF VCC = 0V, f = 1 MHz, Ta = 25 C. (Note 1). D011 VDR RAM data retention V. voltage (2). Note 1: This parameter is periodically sampled and not 100% tested. Typical measurements taken at room temperature (25 C). 2: This is the limit to which VDD can be lowered without losing RAM data. This parameter is periodically sampled and not 100% tested. DS22100F-page 2 2008-2011 Microchip Technology Inc. 23A256/23K256 . TABLE 1-2: AC CHARACTERISTICS. Industrial (I): TA = -40 C to +85 C. AC CHARACTERISTICS. Automotive (E): TA = -40 C to +125 C. Param. Sym. Characteristic Min. Max. Units Test Conditions No. 1 FCLK Clock frequency 10 MHz VCC (I- temp ). 16 MHz VCC (I- temp ).

5 16 MHz VCC (E- temp ). 20 MHz VCC (I- temp ). 2 TCSS CS setup time 50 ns VCC (I- temp ). 32 ns VCC (I- temp ). 32 ns VCC (E- temp ). 25 ns VCC (I- temp ). 3 TCSH CS hold time 50 ns VCC (I- temp ). 50 ns VCC (I- temp ). 50 ns VCC (E- temp ). 50 ns VCC (I- temp ). 4 TCSD CS disable time 50 ns VCC (I- temp ). 32 ns VCC (I- temp ). 32 ns VCC (E- temp ). 25 ns VCC (I- temp ). 5 Tsu Data setup time 10 ns VCC (I- temp ). 10 ns VCC (I- temp ). 10 ns VCC (E- temp ). 10 ns VCC (I- temp ). 6 THD Data hold time 10 ns VCC (I- temp ). 10 ns VCC (I- temp ). 10 ns VCC (E- temp ). 10 ns VCC (I- temp ). 7 TR CLK rise time 2 us Note 1. 8 TF CLK fall time 2 us Note 1. 9 THI Clock high time 50 ns VCC (I- temp ). 32 ns VCC (I- temp ). 32 ns VCC (E- temp ). 25 ns VCC (I- temp ). 10 TLO Clock low time 50 ns VCC (I- temp ). 32 ns VCC (I- temp ). 32 ns VCC (E- temp ). 25 ns VCC (I- temp ). 11 TCLD Clock delay time 50 ns VCC (I- temp ). 32 ns VCC (I- temp ). 32 ns VCC (E- temp ). 25 ns VCC (I- temp ). 12 TV Output valid from clock low 50 ns VCC (I- temp ).

6 32 ns VCC (I- temp ). 32 ns VCC (E- temp ). 25 ns VCC (I- temp ). 13 THO Output hold time 0 ns Note 1. Note 1: This parameter is periodically sampled and not 100% tested. 2008-2011 Microchip Technology Inc. DS22100F-page 3. 23A256/23K256 . TABLE 1-2: AC CHARACTERISTICS (CONTINUED). Industrial (I): TA = -40 C to +85 C. AC CHARACTERISTICS. Automotive (E): TA = -40 C to +125 C. Param. Sym. Characteristic Min. Max. Units Test Conditions No. 14 TDIS Output disable time 20 ns VCC (I- temp ). 20 ns VCC (I- temp ). 20 ns VCC (E- temp ). 20 ns VCC (I- temp ). 15 THS HOLD setup time 10 ns . 16 THH HOLD hold time 10 ns . 17 THZ HOLD low to output High-Z 10 ns . 18 THV HOLD high to output valid 50 ns . Note 1: This parameter is periodically sampled and not 100% tested. TABLE 1-3: AC TEST CONDITIONS. AC Waveform: Input pulse level VCC to VCC. Input rise/fall time 5 ns Operating temperature -40 C to +125 C. CL = 100 pF . Timing Measurement Reference Level: Input VCC.

7 Output VCC. DS22100F-page 4 2008-2011 Microchip Technology Inc. 23A256/23K256 . FIGURE 1-1: HOLD TIMING. CS. 16 16. 15 15. SCK. 17 17. High-Impedance SO n+2 n+1 n n n-1. Don't Care 5. SI n+2 n+1 n n n-1. HOLD. FIGURE 1-2: SERIAL INPUT TIMING. 4. CS. 2 11. 7. 8 3. SCK. 5 6. SI MSB in LSB in High-Impedance SO. FIGURE 1-3: SERIAL OUTPUT TIMING. CS. 9 10 3. SCK. 12. 13 14. SO MSB out LSB out Don't Care SI. 2008-2011 Microchip Technology Inc. DS22100F-page 5. 23A256/23K256 . FUNCTIONAL DESCRIPTION Read Sequence The device is selected by pulling CS low. The 8-bit Principles of Operation READ instruction is transmitted to the 23X256 followed The 23X256 is a 32,768-byte Serial SRAM designed to by the 16-bit address, with the first MSB of the address interface directly with the Serial Peripheral Interface being a don't care bit. After the correct READ. (SPI) port of many of today's popular microcontroller instruction and address are sent, the data stored in the families, including Microchip 's PIC microcontrollers.

8 It memory at the selected address is shifted out on the may also interface with microcontrollers that do not SO pin. have a built-in SPI port by using discrete I/O lines If operating in Page mode, after the first byte of data is programmed properly in firmware to match the SPI shifted out, the next memory location on the page can protocol. be read out by continuing to provide clock pulses. This The 23X256 contains an 8-bit instruction register. The allows for 32 consecutive address reads. After the device is accessed via the SI pin, with data being 32nd address read the internal address counter wraps clocked in on the rising edge of SCK. The CS pin must back to the byte 0 address in that page. be low and the HOLD pin must be high for the entire If operating in Sequential mode, the data stored in the operation. memory at the next address can be read sequentially Table 2-1 contains a list of the possible instruction by continuing to provide clock pulses.

9 The internal bytes and format for device operation. All instructions, Address Pointer is automatically incremented to the addresses and data are transferred MSB first, LSB last. next higher address after each byte of data is shifted out. When the highest address is reached (7 FFFh), Data (SI) is sampled on the first rising edge of SCK the address counter rolls over to address 0000h, after CS goes low. If the clock line is shared with other allowing the read cycle to be continued indefinitely. peripheral devices on the SPI bus, the user can assert The read operation is terminated by raising the CS pin the HOLD input and place the 23X256 in HOLD' mode. (Figure 2-1). After releasing the HOLD pin, operation will resume from the point when the HOLD was asserted. Write Sequence Modes of Operation Prior to any attempt to write data to the 23X256, the device must be selected by bringing CS low. The 23A256/23K256 has three modes of operation that are selected by setting bits 7 and 6 in the STATUS Once the device is selected, the Write command can register.

10 The modes of operation are Byte, Page and be started by issuing a WRITE instruction, followed by Burst. the 16-bit address, with the first MSB of the address being a don't care bit, and then the data to be written. Byte Operation is selected when bits 7 and 6 in the A write is terminated by the CS being brought high. STATUS register are set to 00. In this mode, the read/. write operations are limited to only one byte. The If operating in Page mode, after the initial data byte is Command followed by the 16-bit address is clocked into shifted in, additional bytes can be shifted into the the device and the data to/from the device is transferred device. The Address Pointer is automatically on the next 8 clocks (Figure 2-1, Figure 2-2). incremented. This operation can continue for the entire page (32 Bytes) before data will start to be overwritten. Page Operation is selected when bits 7 and 6 in the STATUS register are set to 10.