Transcription of 28/40/44-Pin Flash Microcontrollers with XLP Technology
1 2010-2015 Microchip Technology 1 PIC18F2XK20/4XK20 High-Performance RISC CPU C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code Up to 1024 bytes Data EEPROM Up to 64 Kbytes Linear Program Memory Addressing Up to 3936 bytes Linear Data Memory Addressing Up to 16 MIPS Operation 16-bit Wide Instructions, 8-bit Wide Data Path Priority Levels for Interrupts 31-Level, Software Accessible Hardware Stack 8 x 8 Single-Cycle Hardware MultiplierFlexible Oscillator Structure Precision 16 MHz Internal Oscillator Block:- Factory calibrated to 1%- Software selectable frequencies range of 31 kHz to 16 MHz- 64 MHz performance available using PLL no external components required Four Crystal Modes up to 64 MHz Two External Clock Modes up to 64 MHz 4X Phase Lock Loop (PLL) Secondary Oscillator using Timer1 @ 32 kHz Fail-Safe Clock Monitor:- Allows for safe shutdown, if peripheral clock stops- Two-Speed Oscillator Start-upSpecial Microcontroller Features Operating Voltage Range: to Self-Programmable under Software Control Programmable 16-Level High/Low-Voltage Detection (HLVD) module:- Interrupt on High/Low-Voltage Detection Programmable Brown-out Reset (BOR):- With software enable option Extended Watchdog Timer (WDT):- Programmable period from 4 ms to 131s Single-Supply 3V In-Circuit Serial Programming (ICSP ) via Two Pins In-Circuit Debug (ICD) via Two PinsExtreme Low-Power Management with XLP Sleep Mode: < 100 nA @ Watchdog Timer: < 800 nA @ Timer1 Oscillator: < 800 nA @ 32 kHz and Features Analog-to-Digital Converter (ADC) Module: - 10-bit resolution, 13 External Channels- Auto-acquisition capability- Conversion available during Sleep- Fixed Voltage Reference (FVR) channel- Independent input multiplexing Analog Comparator Module.
2 - Two rail-to-rail analog comparators- Independent input multiplexing Voltage Reference (CVREF) Module - Programmable (% VDD), 16 steps- Two 16-level voltage ranges using VREF pinsPeripheral Highlights Up to 35 I/O Pins plus 1 Input-only Pin:- High-Current Sink/Source 25 mA/25 mA- Three programmable external interrupts- Four programmable interrupt-on-change- Eight programmable weak pull-ups- Programmable slew rate Capture/Compare/PWM (CCP) Module Enhanced CCP (ECCP) module:- One, two or four PWM outputs- Selectable polarity- Programmable dead time- Auto-shutdown and auto-restart Master Synchronous Serial Port (MSSP) Module- 3-wire SPI (supports all four modes)-I2C Master and Slave modes with address mask Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) Module:- Supports RS-485, RS-232 and LIN- RS-232 operation using internal oscillator- Auto-Wake-up on Break- Auto-Baud Detect28/40/44-Pin Flash Microcontrollers with XLP TechnologyPIC18F2XK20/4XK20DS40001303H-p age 2 2010-2015 Microchip Technology Family TypesDeviceProgram MemoryData MemoryI/O(1)10-bitA/D (ch)(2)CCP/ECCP(PWM) (bytes)# Single-WordInstructions SRAM(bytes)EEPROM(bytes)SPIM asterI2C PIC18F23K208K409651225625111/1YY121/3 PIC18F24K2016K819276825625111/1YY121/3 PIC18F25K2032K16384153625625111/1YY121/3 PIC18F26K2064k327683936102425111/1YY121/ 3 PIC18F43K208K409651225636141/1YY121/3 PIC18F44K2016K819276825636141/1YY121/3 PIC18F45K2032K16384153625636141/1YY121/3 PIC18F46K2064k327683936102436141/1YY121/ 3 Note 1:One pin is :Channel count includes internal Fixed Voltage Reference :For other small form-factor package availability and marking information, please visit or contact your local sales office.
3 2010-2015 Microchip Technology 3 PIC18F2XK20/4XK20 Pin DiagramsFIGURE 1:28-PIN SPDIP, SOIC, SSOPFIGURE 2:28-PIN QFN/UQFN10112345618791213141516171819202 324252627282221 MCLR/VPP/RE3AN0/C12IN0-/RA0AN1/C12IN1-/R A1AN2/VREF-/CVREF/C2IN+/RA2AN3/VREF+/C1I N+/RA3T0 CKI/C1 OUT/RA4AN4/SS/HLVDIN/C2 OUT/RA5 VSSOSC1/CLKIN/RA7 OSC2/CLKOUT/RA6T1 OSO/T13 CKI/RC0T1 OSI/CCP2(1)/RC1 CCP1/P1A/RC2 SCK/SCL/RC3RB7/KBI3/PGDRB6//KBI2/PGCRB5/ KBI1/PGMRB4/KBI0/AN11/P1 DRB3/AN9/C12IN2-/CCP2(1)RB2/INT2/AN8/P1 BRB1/INT1/AN10/C12IN3-/P1 CRB0/INT0/FLT0/AN12 VDDVSSRC7/RX/DTRC6/TX/CKRC5/SDORC4/SDI/S DAPIC18F23K20 PIC18F24K20 PIC18F25K20 PIC18F26K20 Note:See Table 1 for pin allocation 112361181920212212 13 14158716172324252627289T1 OSO/T13 CKI/RC054RB7/KBI3/PGDRB6/KBI2/PGCRB5/KBI 1/PGMRB4/KBI0/AN11/P1 DRB3/AN9/C12IN2-/CCP2(1)RB2/INT2/AN8/P1 BRB1/INT1/AN10/C12IN3-/P1 CRB0/INT0/FLT0/AN12 VDDVSSRC7/RX/DTTX/CK/RC6 SDO/RC5 SDI/SDA/RC4RE3/MCLR/VPPRA0/AN0/C12IN0-RA 1/AN1/C12IN1-AN2/VREF-/CVREF/C2IN+/RA2AN 3/VREF+/C1IN+/RA3T0 CKI/C1 OUT/RA4AN4/SS/HLVDIN/C2 OUT/RA5 VSSOSC1/CLKIN/RA7 OSC2/CLKOUT/RA6T1 OSI/CCP2(1)/RC1 CCP1/P1A/RC2 SCK/SCL/RC3 PIC18F23K20 PIC18F24K20 PIC18F25K20 PIC18F26K20 Note 1:RB3 is the alternate pin for CCP2 :UQFN package availability applies only to :See Ta b l e 1 for pin allocation :The exposed pad should be connected to 4 2010-2015 Microchip Technology 3:40-PIN PDIPFIGURE 4.
4 40-PIN UQFNRB7/KBI3/PGDRB6/KBI2/PGCRB5/KBI1/PGM RB4/KBI0/AN11RB3/AN9/C12IN2-/CCP2(1)RB2/ INT2/AN8RB1/INT1/AN10/C12IN3-RB0/INT0/FL T0/AN12 VDDVSSRD7/PSP7/P1 DRD6/PSP6/P1 CRD5/PSP5/P1 BRD4/PSP4RC7/RX/DTRC6/TX/CKRC5/SDORC4/SD I/SDARD3/PSP3RD2/PSP2 MCLR/VPP/RE3AN0/C12IN0-/RA0AN1/C12IN1-/R A1AN2/VREF-/CVREF/C2IN+/RA2AN3/VREF+/C1I N+/RA3T0 CKI/C1 OUT/RA4AN4/SS/HLVDIN/C2 OUT/RA5RD/AN5/RE0WR/AN6/RE1CS/AN7/RE2 VDDVSSOSC1/CLKIN/RA7 OSC2/CLKOUT/RA6T1 OSO/T13 CKI/RC0T1 OSI/CCP2(1)/RC1 CCP1/P1A/RC2 SCK/SCL/RC3 PSP0/RD0 PSP1/RD112345678910111213141516171819204 039383736353433323130292827262524232221 PIC18F43K20 PIC18F44K20 PIC18F45K20 PIC18F46K20 Note:See Ta b l e 2 for pin allocation 19 20212212 13 14 15388740 3916 172930313233232425262728363435937AN1/C12 /IN1-/RA1AN0/C12IN0-/RA0 MCLR/VPP/RE3AN9/C12IN2-/CCP/RB3 KBI3/PGD/RB7 KBI2/PGC/RB6 KBI1/PGM/RB5 KBI0/AN11/RB4RC6/TX/CkRC5/SDORC4/SDI/SDA RD3/PSP3RD2/PSP2RD1/PSP1RD0/PSP0RC3/SCK/ SCLRC2/CCP1/P1 ARC1/T1 OSI/CCP2RC0/T1 OSO/T13 CKIRA6/OSC2/CLKOUTRA7/OSC1/CLKINVSSVDDRE 2/CS/AN7RE1/WR/AN6RE0/RD/AN5RA5/AN4/SS/H LVDIN/C2 OUTRA4/T0 CKI/C1 OUTRX/DT/RC7RD4/PSP4/RD4 PSP5/P1B/RD5RD6/PSP6/P1C/RD6 PSP7/P1D/RD7 VSSVDDINT0/FLT0/AN12/RB0 INT1/AN10/C12IN3-/RB1 INT2/AN8/RB2AN3/VREF+/C1IN+/RA3AN2/VREF- /CVREF/C2IN+/RA2 PIC18F4XK20 Note 1:See Ta b l e 2 for location of all peripheral :It is recommended that the exposed bottom pad be connected to VSS.
5 2010-2015 Microchip Technology 5 PIC18F2XK20/4XK20 FIGURE 5:44-PIN QFNFIGURE 6:44-PIN TQFP101123456118192021221213141538874443 4241403916172930313233232425262728363435 937AN3/VREF+/C1IN+/RA3AN2/VREF-/CVREF/C2 IN+/RA2AN1/C12IN1-/RA1AN0/C12IN0-/RA0 MCLR/VPP/RE3AN9/C12IN2-/CCP2(1)/RB3 KBI3/PGD/RB7 KBI2/PGC/RB6 KBI1/PGM/RB5 KBI0/AN11/RB4 NCRC6/TX/CKRC5/SDORC4/SDI/SDARD3/PSP3RD2 /PSP2RD1/PSP1RD0/PSP0RC3/SCK/SCLRC2/CCP1 /P1 ARC1/T1 OSI/CCP2(1)RC0/T1 OSO/T13 CKIRA6/OSC2/CLKOUTRA7/OSC1/CLKINVSSVSSVD DVDDRE2/CS/AN7RE1/WR/AN6RE0/RD/AN5RA5/AN 4/SS/HLVDIN/C2 OUTRA4/T0 CKI/C1 OUTRX/DT/RC7RD4/PSP4/RD4 PSP5/P1B/RD5 PSP6/P1C/RD6 PSP7/P1D/RD7 VSSVDDVDDINT0/FLT0/AN12/RB0 INT1/AN10/C12IN3-/RB1 INT2/AN8/RB2 PIC18F43K20 PIC18F44K20 PIC18F45K20 PIC18F46K20 Note 1:RB3 is the alternate pin for CCP2 :The exposed pad should be connected to :See Table 2 for pin allocation +/C1IN+/RA3AN2/VREF-/CVREF/C2IN+/RA2AN1/ C12IN1-/RA1AN0/C12IN0-/RA0 MCLR/VPP/RE3 NCKBI3/PGD/RB7 KBI2/PGC/RB6 KBI1/PGM/RB5 KBI0/AN11/RB4 NCRC6/TX/CKRC5/SDORC4/SDI/SDARD3/PSP3RD2 /PSP2RD1/PSP1RD0/PSP0RC3/SCK/SCLRC2/CCP1 /P1 ARC1/T1 OSI/CCP2(1)NCNCRC0/T1 OSO/T13 CKIRA6/OSC2/CLKOUTRA7/OSC1/CLKINVSSVDDRE 2/CS/AN7RE1/WR/AN6RE0/RD/AN5RA5/AN4/SS/H LVDIN/C2 OUTRA4/T0 CKI/C1 OUTRX/DT/RC7 PSP4/RD4 PSP6/P1C/RD6 PSP7/P1D/RD7 VSSVDDINT0/FLT0/AN12/RB0 INT1/AN10/C12IN3-/RB1 INT2/AN8/RB2AN9/C12IN2-/CCP2(1)/RB3 PIC18F43K20 PIC18F44K20 PIC18F45K20 PIC18F46K20 Note 1:RB3 is the alternate pin for CCP2 :See Table 2 for pin allocation table.
6 PSP5/P1B/RD5 PIC18F2XK20/4XK20DS40001303H-page 6 2010-2015 Microchip Technology Allocation TablesTABLE 1:28-PIN ALLOCATION TABLE (PIC18F2XK20)I/O28-Pin SPDIP, SOIC, SSOP28-Pin QFN/UQFNA nalogComparatorReferenceECCPEUSARTMSSPT imersSlaveInterruptsPull-upBasicRA0227AN 0C12IN0- RA1328AN1C12IN1- RA241AN2C2IN+VREF-/CVREF RA352AN3C1IN+VREF+ RA463 C1 OUT T0 CKI RA574AN4C2 OUTHLVDIN SS RA6107 OSC2/CLKOUTRA796 OSC1/CLKINRB02118AN12 FLT0 INT0 Yes RB12219AN10C12IN3- P1C INT1 Yes RB22320AN8 P1B INT2 Yes RB32421AN9C12IN2-CCP2(1) Yes RB42522AN11 P1D KBI0 Yes RB52623 KBI1 YesPGMRB62724 KBI2 YesPGCRB72825 KBI3 YesPGDRC0118 T1 OSO/T13 CKI RC1129 CCP2(2) T1 OSI RC21310 CCP1/P1A RC31411 SCK/SCL RC41512 SDI/SDA RC51613 SDO RC61714 TX/CK RC71815 RX/DT RE3(3)126 MCLR/VPP85 VSS1916 VSS2017 VDDNote 1:CCP2 multiplexed with RB3 when CONFIG3H<0> = 02.
7 CCP2 multiplexed with RC1 when CONFIG3H<0> = 13:Input-only 2010-2015 Microchip Technology 7 PIC18F2XK20/4XK20 TABLE 2:40/44-PIN ALLOCATION TABLE (PIC18F4XK20)I/O40-Pin PDIP 40-Pin UQFN44-Pin TQFP 44-Pin QFN RA13182020AN1C12IN1- RA24192121AN2C2IN+VREF-/CVREF RA35202222AN3C1IN+VREF+ RA46212323 C1 OUT T0 CKI RA57222424AN4C2 OUT HLVDIN SS RA614293133 OSC2/CLKOUTRA713283032 OSC1/CLKINRB033889AN12 FLT0 INT0 Yes RB1349910AN10C12IN3- INT1 Yes RB235101011AN8 INT2 Yes RB336111112AN9C12IN2- CCP2(1) Yes RB437121414AN11 KBI0 Yes RB538131515 KBI1 YesPGMRB639141616 KBI2 YesPGCRB740151717 KBI3 YesPGDRC015303234 T1 OSO/T13 CKI RC116313535 CCP2(2) T1 OSI RC217323636 CCP1/P1A RC318333737 SCK/SCL RC423384242 SDI/SDA RC524394343 SDO RC625404444 TX/CK RC726111 RX/DT RD019343838 PSP0 RD120353939 PSP1 RD221364040 PSP2 RD322374141 PSP3 RD427222 PSP4 RD528333 P1B PSP5 RD629444 P1C PSP6 Note 1:CCP2 multiplexed with RB3 when CONFIG3H<0> = 02:CCP2 multiplexed with RC1 when CONFIG3H<0> = 13 8 2010-2015 Microchip Technology P1D PSP7 RE08232525AN5 RD RE19242626AN6 WR RE210252727AN7 CS RE3(3)1161818 MCLR/VPP 11777 VDD 32262828 VDD 12666 VSS 31272930 VSS NC8 VDD NC29 VDD - NC31 VSSTABLE 2:40/44-PIN ALLOCATION TABLE (PIC18F4XK20) (CONTINUED)I/O40-Pin PDIP 40-Pin UQFN44-Pin TQFP 44-Pin QFN 1:CCP2 multiplexed with RB3 when CONFIG3H<0> = 02.
8 CCP2 multiplexed with RC1 when CONFIG3H<0> = 13:Input-only. 2010-2015 Microchip Technology 9 PIC18F2XK20/4XK20 Table of Overview .. Module (With Fail-Safe Clock Monitor).. Modes .. Organization .. Program EEPROM Memory .. x 8 Hardware .. I/O Ports .. Capture/Compare/PWM (CCP) Modules .. Timer0 Module .. Timer1 Module .. Timer2 Module .. Timer3 Module .. Enhanced Capture/Compare/PWM (ECCP) Master Synchronous Serial Port (MSSP) Module .. Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) .. Analog-to-Digital Converter (ADC) Module .. Comparator Voltage High/Low-Voltage Detect (HLVD).. Special Features of the Instruction Set Summary .. Development Electrical Characteristics .. DC and AC Characteristics Graphs and Packaging 410 Appendix A: Revision 435 Appendix B: Device Differences .. 436 The Microchip Web Site.
9 437 Customer Change Notification Service .. 437 Customer Support .. 437 Product Identification System .. 438 PIC18F2XK20/4XK20DS40001303H-page 10 2010-2015 Microchip Technology OUR VALUED CUSTOMERSIt is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchipproducts. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined andenhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department viaE-mail at We welcome your Current Data SheetTo obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any last character of the literature number is the version number, ( , DS30000000A is version A of document DS30000000).
10 ErrataAn errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for currentdevices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revisionof silicon and revision of document to which it determine if an errata sheet exists for a particular device, please check with one of the following: Microchip s Worldwide Web site; Your local Microchip sales office (see last page)When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you Notification SystemRegister on our web site at to receive the most current information on all of our products. 2010-2015 Microchip Technology 11 PIC18F2XK20 OVERVIEWThis document contains device specific information forthe following devices:This family offers the advantages of all PIC18microcontrollers namely, high computationalperformance at an economical price with the additionof high-endurance, Flash program memory.