8-Pin Flash Microcontrollers with XLP Technology

1 2011-2015 Microchip Technology 1 High-Performance RISC CPU Only 49 Instructions to Learn:- All single-cycle instructions except branches Operating Speed:- DC 32 MHz oscillator/clock input- DC 125 ns instruction cycle Interrupt Capability with Automatic Context Saving 16-Level Deep Hardware Stack with Optional Overflow/Underflow Reset Direct, Indirect and Relative Addressing modes:- Two full 16-bit File Select Registers (FSRs)- FSRs can read program and data memoryFlexible Oscillator Structure Precision 32 MHz Internal Oscillator Block:- Factory calibrated to 1%, typical- Software selectable frequencies range of 31 kHz to 32 MHz 31 kHz Low-Power Internal Oscillator Four Crystal modes up to 32 MHz Three External Clock modes up to 32 MHz 4X Phase Lock Loop (PLL) Fail-Safe Clock Monitor:- Allows for safe shutdown if peripheral clock stops Two-Speed Oscillator Start-up Reference Clock module:- Programmable clock output frequency and duty-cycleSpecial Microcontroller Features Operating Voltage Range:- (PIC12F1840)- (PIC12LF1840) Self-Reprogrammable under Software Control Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) Programmable Brown-out Reset (BOR) Extended Watchdog Timer (WDT) In-Circuit Serial Programming (ICSP ) via Two Pins In-Circuit Debug (ICD) via Two Pins Enhanced Low-Voltage Programming (LVP) Programmable Code Protection Power-Saving Sleep modeExtreme Low-Power Management with PIC12LF1840 XLP Sleep mode: 20 nA @ , typical Watchdog Timer: 500 nA @ , typical Timer1 Oscillator: 300 nA @ 32 kHz, , typical Operating Current: 30 A/MHz @ , typicalAnalog Features Analog-to-Digital Converter (ADC) module:- 10-bit resolution, 4 channels- Conversion available during Sleep Analog Comparator module.

2 - One rail-to-rail analog comparator- Power mode control- Software controllable hysteresis Voltage Reference module:- Fixed Voltage Reference (FVR) with , and output levels- 5-bit rail-to-rail resistive DAC with positive and negative reference selectionPeripheral Highlights 5 I/O Pins and 1 Input-Only Pin:- High current sink/source 25 mA/25 mA- Programmable weak pull-ups- Programmable interrupt-on-change pins Timer0: 8-Bit Timer/Counter with 8-Bit Prescaler Enhanced Timer1:- 16-bit timer/counter with prescaler- External Gate Input mode- Dedicated, low-power 32 kHz oscillator driver Timer2: 8-Bit Timer/Counter with 8-Bit PeriodRegister, Prescaler and Postscaler Enhanced CCP (ECCP) module:- Software selectable time bases- Auto-shutdown and auto-restart- PWM steering Master Synchronous Serial Port (MSSP) with SPI and I2 CTM with:- 7-bit address masking- SMBus/PMBusTM compatibility Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) module:- RS-232, RS-485 and LIN compatible- Auto-Baud Detect Capacitive Sensing (CPS) module (mTouchTM):- 4 input channelsPIC12(L)F18408-Pin Flash Microcontrollers with XLP TechnologyPIC12(L)F1840DS40001441F-page 2 2011-2015 Microchip Technology Features (Continued) Data Signal Modulator module:- Selectable modulator and carrier sources SR Latch.

3 - Multiple Set/Reset input options- Emulates 555 Timer applicationsPIC12(L)F1822/1840/PIC16(L)F 182X/1847 Family TypesDeviceData Sheet IndexProgram MemoryFlash (words)Data EEPROM(bytes)Data SRAM(bytes)I/O s(2)10-bit ADC (ch)CapSense (ch)ComparatorsTimers(8/16-bit)EUSARTMSS P (I2C /SPI)ECCP (Full-Bridge)ECCP (Half-Bridge)CCPSR LatchDebug(1)XLPPIC12(L)F1822(1)2K256128 64412/1110/1/0YI/HYPIC12(L)F1840(2)4K256 25664412/1110/1/0YI/HYPIC16(L)F1823(1)2K 256128128822/1111/0/0YI/HYPIC16(L)F1824( 3)4K256256128824/1111/1/2YI/HYPIC16(L)F1 825(4)8K2561024128824/1111/1/2YI/HYPIC16 (L)F1826(5)2K25625616121222/1111/0/0YI/H YPIC16(L)F1827(5)4K25638416121224/1121/1 /2YI/HYPIC16(L)F1828(3)4K25625618121224/ 1111/1/2YI/HYPIC16(L)F1829(4)8K256102418 121224/1121/1/2YI/HYPIC16(L)F1847(6)8K25 6102416121224/1121/1/2YI/HYNote 1:I - Debugging, Integrated on Chip; H - Debugging, available using Debug :One pin is Sheet Index: (Unshaded devices are described in this document.)1:DS41413 PIC12(L)F1822/PIC16(L)F1823 Data Sheet, 8/14-Pin Flash :DS41441 PIC12(L)F1840 Data Sheet, 8-Pin Flash :DS41419 PIC16(L)F1824/1828 Data Sheet, 28/40/44-Pin Flash :DS41440 PIC16(L)F1825/1829 Data Sheet, 14/20-Pin Flash :DS41391 PIC16(L)F1826/1827 Data Sheet, 18/20/28-Pin Flash :DS41453 PIC16(L)F1847 Data Sheet, 18/20/28-Pin Flash :For other small form-factor package availability and marking information, please or contact your local sales office.

4 2011-2015 Microchip Technology 3 PIC12(L)F1840 FIGURE 1: 8-Pin DIAGRAM FOR PIC12(L)F1840 TABLE 1: 8-Pin ALLOCATION TABLE (PIC12(L)F1840)I/O8-Pin PDIP/SOIC/DFN/UDFNADCR eferenceCap SenseComparatorSR LatchTimersECCPEUSARTMSSPI nterruptModulatorPull-upBasicRA07AN0 DACOUTCPS0C1IN+ P1 BTXCKSDOSS(1)IOCMDOUTYICSPDATICDDATRA16A N1 VREFCPS1C1IN0-SRI RXDTSCLSCKIOCMDMINYICSPCLKICPCLKRA25AN2 CPS2C1 OUTSRQT0 CKICCP1P1 AFLT0 SDASDIINT/IOCMDCIN1Y RA34 T1G(1) SSIOC YMCLRVPPRA43AN3 CPS3C1IN1- T1GT1 OSOP1B(1)TX(1)CK(1)SDO(1)IOCMDCIN2 YOSC2 CLKOUTCLKRRA52 SRNQT1 CKIT1 OSICCP1(1)P1A(1)RX(1)DT(1) IOC YOSC1 CLKINVDD1 VDDVSS8 VSSNote 1:Alternate pin function selected with the APFCON (Register 12-1) , SOIC, DFN, UDFN12348765 VDDRA5RA4 MCLR/VPP/RA3 VSSRA0/ICSPDATRA1/ICSPCLKRA2 Note 1:See Ta b l e 1 for the location of all peripheral (L)F1840 PIC12(L)F1840DS40001441F-page 4 2011-2015 Microchip Technology of Overview .. Mid-range CPU .. Organization .. Configuration.

5 Module (with Fail-Safe Clock Monitor) .. Clock Module .. Mode (Sleep) .. Watchdog Timer (WDT) .. Data EEPROM and Flash Program Memory Control .. I/O Ports .. Interrupt-on-Change .. Fixed Voltage Reference (FVR) .. Temperature Indicator Module .. Analog-to-Digital Converter (ADC) Module .. Digital-to-Analog Converter (DAC) Module .. SR Comparator Timer0 Module .. Timer1 Module with Gate Timer2 Module .. Data Signal Modulator .. Capture/Compare/PWM Modules .. Master Synchronous Serial Port Module .. Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) .. Capacitive Sensing (CPS) Module .. In-Circuit Serial Programming (ICSP ) .. Instruction Set Summary .. Electrical DC and AC Characteristics Graphs and Charts .. Development Packaging 380 Appendix A: Data Sheet Revision History .. 393 Appendix B: Migrating From Other PIC Devices .. 393 The Microchip Web Site.

6 394 Customer Change Notification Service .. 394 Customer Support .. 394 Product Identification 395 2011-2015 Microchip Technology 5 PIC12(L)F1840TO OUR VALUED CUSTOMERSIt is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchipproducts. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined andenhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department viaE-mail at We welcome your Current Data SheetTo obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any last character of the literature number is the version number, ( , DS30000000A is version A of document DS30000000).

7 ErrataAn errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for currentdevices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revisionof silicon and revision of document to which it determine if an errata sheet exists for a particular device, please check with one of the following: Microchip s Worldwide Web site; Your local Microchip sales office (see last page)When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you Notification SystemRegister on our web site at to receive the most current information on all of our (L)F1840DS40001441F-page 6 2011-2015 Microchip Technology OVERVIEWThe PIC12(L)F1840 are described within this data are available in 8-Pin packages. Figure 1-1 shows ablock diagram of the PIC12(L)F1840 devices. Ta b l e 1 - 2shows the pinout Ta b l e 1 - 1 for peripherals available 1-1:DEVICE PERIPHERAL SUMMARYP eripheral PIC12(L)F1840 ADC Capacitive Sensing (CPS) Module Data EEPROM Digital-to-Analog Converter (DAC) Digital Signal Modulator (DSM) EUSART Fixed Voltage Reference (FVR) SR Latch Capture/Compare/PWM ModulesECCP1 ComparatorsC1 Master Synchronous Serial PortsMSSP TimersTimer0 Timer1 Timer2 2011-2015 Microchip Technology 7 PIC12(L)F1840 FIGURE 1-1:PIC12(L)F1840 BLOCK DIAGRAMPORTAEUSARTC omparatorsMSSPT imer1 Timer0 ECCP1 ADC10-BitSRLatchNote1:See applicable chapters for more information on :See Ta b l e 1 - 1 for peripherals available on specific MemoryEEPROMRAMT imingGenerationINTRCO scillatorMCLR(Figure 2-1)ModulatorCapSenseClockCLKRR eferenceDACFVROSC1/CLKINOSC2/CLKOUTPIC12 (L)F1840DS40001441F-page 8 2011-2015 Microchip Technology 1-2.

8 PIC12(L)F1840 PINOUT DESCRIPTIONNameFunctionInput TypeOutput TypeDescriptionRA0/AN0/CPS0/C1IN+/DACOUT /TX/CK/SDO/SS(1)/P1B/MDOUT/ICSPDAT/ICDDA TRA0 TTLCMOS General purpose ADC Channel 0 Capacitive sensing input +AN Comparator C1 positive ANDigital-to-Analog Converter CMOS USART asynchronous USART synchronous CMOS SPI data Slave Select CMOS PWM CMOS Modulator ICSP Data General purpose ADC Channel 1 Capacitive sensing input ADC and DAC Positive Voltage Reference Comparator C1 negative SR Latch USART asynchronous USART synchronous ODI2C SPI Modulator source Serial Programming General purpose ADC Channel 2 Capacitive sensing input CMOS Comparator C1 CMOS SR Latch non-inverting Timer0 clock Capture/Compare/PWM CMOS PWM ECCP Auto-Shutdown Fault ODI2C data SPI data External Modulator Carrier Input (1)/VPP/MCLRRA3 TTL General purpose Slave Select Timer1 Gate Programming Master Clear with internal :AN = Analog input or output CMOS = CMOS compatible input or outputOD= Open DrainTTL = TTL compatible inputST= Schmitt Trigger input with CMOS levels I2C = Schmitt Trigger input with I2C HV = High VoltageXTAL = CrystallevelsNote 1:Alternate pin function selected with the APFCON (Register 12-1) register.

9 2011-2015 Microchip Technology 9 PIC12(L)F1840RA4/AN3/CPS3/OSC2/CLKOUT/T1 OSO/C1IN1-/CLKR/SDO(1)/CK(1)/TX(1)/P1B(1 )/T1G/MDCIN2RA4 TTLCMOS General purpose ADC Channel 3 Capacitive sensing input XTALC rystal/Resonator (LP, XT, HS modes).CLKOUT CMOS FOSC/4 oscillator Comparator C1 negative CMOS Clock Reference CMOS SPI data USART synchronous CMOS USART asynchronous CMOS PWM Timer1 Gate Modulator Carrier Input (1)/CCP1(1)/DT(1)/RX(1)RA5 TTLCMOS General purpose External clock input (EC mode).OSC1 XTAL Crystal/Resonator (LP, XT, HS modes).T1 OSIXTALXTALT imer1 oscillator Timer1 clock CMOS SR Latch inverting CMOS PWM Capture/Compare/PWM USART synchronous USART asynchronous Positive Ground 1-2:PIC12(L)F1840 PINOUT DESCRIPTION (CONTINUED)NameFunctionInput TypeOutput TypeDescriptionLegend:AN = Analog input or output CMOS = CMOS compatible input or outputOD= Open DrainTTL = TTL compatible inputST= Schmitt Trigger input with CMOS levels I2C = Schmitt Trigger input with I2C HV = High VoltageXTAL = CrystallevelsNote 1:Alternate pin function selected with the APFCON (Register 12-1) (L)F1840DS40001441F-page 10 2011-2015 Microchip Technology MID-RANGE CPUThis family of devices contain an enhanced mid-range8-bit CPU core.

10 The CPU has 49 instructions. Interruptcapability includes automatic context saving. Thehardware stack is 16 levels deep and has Overflow andUnderflow Reset capability. Direct, Indirect, andRelative addressing modes are available. Two FileSelect Registers (FSRs) provide the ability to readprogram and data memory. Automatic Interrupt Context Saving 16-level Stack with Overflow and Underflow File Select Registers Instruction SetFIGURE 2-1:CORE BLOCK DIAGRAMData Bus814 ProgramBusInstruction regProgram Counter8 Level Stack(13-bit)Direct Addr712 Addr MUXFSR regSTATUS regMUXALUP ower-upTimerOscillatorStart-up TimerPower-onResetWatchdogTimerInstructi onDecode &ControlTimingGenerationOSC1/CLKINOSC2/C LKOUTVDD88 Brown-outReset123 VSSI nternalOscillatorBlockConfigurationData Bus814 ProgramBusInstruction regProgram Counter8 Level Stack(13-bit)Direct Addr7 Addr MUXFSR regSTATUS regMUXALUW RegInstructionDecode &ControlTimingGenerationVDD883 VSSI nternalOscillatorBlockConfiguration15 Data Bus814 ProgramBusInstruction RegProgram Counter16-Level Stack(15-bit)Direct Addr7 RAM AddrAddr MUXI ndirectAddrFSR0 RegSTATUS RegMUXALUI nstructionDecode andControlTimingGenerationVDD883 VSSI nternalOscillatorBlockConfigurationFlash ProgramMemoryRAMFSR regFSR regFSR1 Reg1515 MUX15 Program MemoryRead (PMR)12 FSR regFSR regBSR Reg5 2011-2015 Microchip Technology 11 PIC12(L)