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1 PLL Performance, Simulation, and Design 2017 SNAA106C May 2017 PLL Performance, Simulation, and Design 5th Edition Dean Banerjee Make Everything as Simple as Possible, but not Simpler. Albert Einstein PLL Performance, Simulation, and Design 2017 SNAA106C May 2017 To my wife, Nancy, and my children, Caleb, Olivia, and Anabelle PLL Performance, Simulation, and Design 2017 SNAA106C May 2017 i Preface I first became familiar with PLLs by working for National Semiconductor (now acquired by Texas Instruments) as an applications engineer. While supporting customers, I noticed that there were many repeat questions. Instead of creating the same response over and over, it made more sense to create a document, worksheet, or program to address these recurring questions in greater detail and just re-send the file.

2 From all of these documents, worksheets, and programs, this book was born. Many questions concerning PLLs can be answered through a greater understanding of the underlying concepts and the mathematics involved. By approaching problems in a rigorous mathematical way one gains a greater level of understanding, a greater level of satisfaction, and the ability to extend the learnings to other problems. Many of the formulas that are commonly used for PLL design and simulation contain gross approximations with no or little justification of how they were derived. Others may be rigorously derived, but are from outdated concepts or are not compared to measured results to ensure they account for all relevant factors. It is therefore no surprise that there are so many rules of thumb which yield unreliable results. There is also the approach of not trusting formulas enough and relying on only measured results.

3 The fault with this is that many great insights are lost and it is difficult to learn and grow in PLL knowledge this way. By knowing what a result should theoretically be, it makes it easier to spot and diagnose problems with a PLL circuit. This book takes a unique approach to PLL design by combining rigorous mathematical derivations for formulas with actual measured data. When there is agreement between these two, then one can feel much more confident with the results. Although PLL technology is evolving, many concepts are timeless and will never become outdated. The fifth edition adds substantial content from the fourth edition regarding many topics including fractional spurs, VCO calibration, delta sigma PLLs, and many other topics. PLL Performance, Simulation, and Design 2017 SNAA106C May 2017 ii PLL Performance, Simulation, and Design 2017 SNAA106C May 2017 iii Table of Contents PLL BASICS.

4 1 CHAPTER 1 BASIC PLL OVERVIEW .. 3 CHAPTER 2 A BRIEF OVERVIEW OF PLL PERFORMANCE CHARACTERISTICS .. 9 CHAPTER 3 IMPACT OF THE PLL PERFORMANCE ON THE SYSTEM .. 14 PLL BUILDING BLOCKS .. 19 CHAPTER 4 INPUT SOURCES, CRYSTALS, AND PRINCIPLES OF OSCILLATION .. 21 CHAPTER 5 THE INPUT PATH AND R DIVIDER .. 27 CHAPTER 6 THE PHASE DETECTOR AND CHARGE PUMP .. 30 CHAPTER 7 THE LOOP FILTER .. 41 CHAPTER 8 VOLTAGE CONTROLLED OSCILLATORS .. 45 CHAPTER 9 PRESCALERS AND HIGH FREQUENCY DIVIDERS .. 61 CHAPTER 10 FUNDAMENTALS OF FRACTIONAL DIVIDERS .. 71 PLL LOOP THEORY .. 79 CHAPTER 11 INTRODUCTION TO LOOP FILTER COEFFICIENTS .. 81 CHAPTER 12 INTRODUCTION TO PLL TRANSFER FUNCTIONS AND NOTATION .. 87 CHAPTER 13 PLL MODULATION, DEMODULATION, AND CLOCK CLEANING .. 94 CHAPTER 14 STABILITY OF PLL LOOP FILTERS .. 103 CHAPTER 15 A SAMPLE LOOP FILTER ANALYSIS .. 115 SPURS .. 119 CHAPTER 16 DIRECT SPURS .. 121 CHAPTER 17 MODULATED SPURS .. 126 CHAPTER 18 MODULATED CROSSTALK SPURS.

5 135 CHAPTER 19 PHASE DETECTOR SPURS AND THEIR CAUSES .. 141 CHAPTER 20 FUNDAMENTALS OF FRACTIONAL SPURS .. 156 CHAPTER 21 DELTA SIGMA FRACTIONAL SPURS .. 170 PHASE NOISE .. 183 CHAPTER 22 OSCILLATOR PHASE NOISE .. 185 CHAPTER 23 PHASE NOISE OF INPUT PATH, CHARGE PUMP, AND DIVIDERS .. 191 CHAPTER 24 PHASE NOISE OF PASSIVE LOOP FILTERS .. 208 CHAPTER 25 PHASE NOISE OF ACTIVE LOOP FILTERS .. 212 CHAPTER 26 INTEGRATED PHASE NOISE QUANTITIES .. 222 CHAPTER 27 A SAMPLE PLL PHASE NOISE ANALYSIS .. 236 PLL Performance, Simulation, and Design 2017 SNAA106C May 2017 iv TRANSIENT RESPONSE .. 245 CHAPTER 28 TRANSIENT RESPONSE OF PLL FREQUENCY SYNTHESIZERS .. 247 CHAPTER 29 IMPACT OF PFD DISCRETE SAMPLING EFFECTS ON THE TRANSIENT RESPONSE .. 267 CHAPTER 30 VCO DIGITAL CALIBRATION TIME FOR INTEGRATED VCOS .. 278 CHAPTER 31 IMPACT OF CAPACITOR DIELECTRIC ABSORPTION AND RAILING ON THE TRANSIENT RESPONSE.

6 286 CHAPTER 32 USING FASTLOCK AND CYCLE SLIP REDUCTION .. 290 LOOP FILTER DESIGN FUNDAMENTALS .. 297 CHAPTER 33 CONCEPTS OF LOOP FILTER DESIGN .. 299 CHAPTER 34 CHOOSING THE LOOP BANDWIDTH .. 305 CHAPTER 35 OPTIMAL CHOICES FOR PHASE MARGIN .. 309 CHAPTER 36 OPTIMAL CHOICES FOR GAMMA OPTIMIZATION PARAMETER .. 314 CHAPTER 37 CHOOSING FILTER ORDER AND POLE RATIOS .. 322 EQUATIONS FOR PLL DESIGN .. 337 CHAPTER 38 EQUATIONS FOR A PASSIVE SECOND ORDER LOOP FILTER .. 339 CHAPTER 39 EQUATIONS FOR A PASSIVE THIRD ORDER LOOP FILTER .. 344 CHAPTER 40 EQUATIONS FOR A PASSIVE FOURTH ORDER LOOP FILTER .. 353 CHAPTER 41 FUNDAMENTALS OF PLL ACTIVE LOOP FILTER DESIGN .. 366 CHAPTER 42 ACTIVE FILTER FROM DIFFERENTIAL PHASE DETECTOR OUTPUTS .. 387 CHAPTER 43 PARTIALLY INTEGRATED LOOP FILTERS .. 390 CHAPTER 44 SWITCHED AND MULTIMODE LOOP FILTER DESIGN .. 422 CHAPTER 45 ROUNDING TECHNIQUES FOR LOOP FILTER COMPONENTS .. 426 ADDITIONAL TOPICS .. 435 CHAPTER 46 PLL LOCK DETECT.

7 437 CHAPTER 47 IMPEDANCE MATCHING ISSUES AND TECHNIQUES FOR PLLS .. 448 CHAPTER 48 PLL DEBUGGING TECHNIQUES .. 461 CHAPTER 49 SOLUTIONS TO HIGHER ORDER POLYNOMIAL EQUATIONS .. 467 SUPPLEMENTAL INFORMATION .. 475 GLOSSARY .. 477 SYMBOLS AN ABBREVIATIONS .. 485 SOFTWARE RECOMMENDATIONS .. 487 OTHER WEBSITES .. 489 COMMONLY USED REFERENCES .. 490 CREDITS .. 491 PLL Performance, Simulation, and Design 2017 SNAA106C May 2017 Basic PLL Overview 1 PLL Basics Log(Frequency) BW Everything Except VCO VCOGain (dB)020 log(N)1N1 RKPDOSCVCOfOSCZ(s)LoopFilterPhaseDetecto r/Charge PumpN DividerR DividerfPDfVCOfN PLL Performance, Simulation, and Design 2017 SNAA106C May 2017 Basic PLL Overview 2 PLL Performance, Simulation, and Design 2017 SNAA106C May 2017 Basic PLL Overview 3 Chapter 1 Basic PLL Overview Introduction The PLL (Phased Locked Loop) has been around for many decades.

8 Some of its earliest applications included keeping power generators in phase and synchronizing to the sync pulse in a TV set. Other applications include recovering a clock from asynchronous data and demodulating an FM modulated signal. Although these are legitimate applications of the PLL, this book focuses mainly on the use of a PLL to generate a stable output frequency. In this situation, the PLL starts with a fixed and stable input frequency and this is used to generate one or more output frequencies. Components that generate a tunable output frequency directly typically are not as stable or low noise as a fixed frequency input, so by using negative feedback as is employed in a PLL, it is possible to get a tunable frequency that has both good accuracy and good noise performance. 1N1 RKPDOSCVCOfOSCZ(s)LoopFilterPhaseDetecto r/Charge PumpN DividerR DividerfPDfVCOfN Figure The Basic PLL PLL Structure and Frequencies The PLL starts with a stable input frequency (fOSC).

9 This frequency is typically fixed and very stable over temperature and process. The R divider reduces this frequency to the phase detector frequency (fPD). The phase-frequency detector then compares the phase of the R divider (fPD) with the phase of the N divider (fN) and produces current correction pulses that have a duty cycle that is proportional to the phase error between the two inputs to the phase detector. These pulses can be sourcing KPD current, sinking KPD current, or off (tri-state). In later chapters, the charge pump is discussed in more depth, but for most practical purposes, it can be treated as an Analog current source that outputs a current of magnitude KPD times the phase error as presented to the phase detector. These current correction pulses then go through a low pass filter called the loop filter, which has a current to voltage transfer function Z(s).

10 The loop filter is typically implemented with discrete components, but can also be integrated on silicon or in the digital domain. The loop filter is application specific and much of this book is devoted to the art of loop filter design. The output voltage of the PLL Performance, Simulation, and Design 2017 SNAA106C May 2017 Basic PLL Overview 4 loop filter then is used to steer the output frequency of the VCO (Voltage Controlled Oscillator). The VCO is a voltage to frequency converter and has a proportionality constant of KVCO. The output of the VCO then goes through the N divider and is divided down to an input of the phase detector, fN. The phase detector compares the input phases and will cause both inputs to be the same frequency and phase in the steady state and the VCO frequency will be as follows: = ( ) The N divider value can be changed in order to produce a range of VCO frequencies that have the same frequency accuracy as the crystal.