bq32000 Real-Time Clock (RTC) - Texas Instruments

1 Bq32 to VReal-TimeClockControllerProductFolderSa mple &BuyTechnicalDocumentsTools &SoftwareSupport &Communitybq32000 SLUS900E DECEMBER2008 REVISEDAUGUST2015bq32000 Real-TimeClock (RTC)1 Features3 DescriptionThe bq32000deviceis a compatiblereplacementfor1 AutomaticSwitchoverto BackupSupplyindustrystandardreal-timeclo cks. I2C InterfaceSupportsSerialClockup to 400 kHzThebq32000featuresan automaticbackupsupply +126-ppmAdjustmentcanbe implementedusinga capacitoror non- 8-PinSOICP ackageprogrammablecalibrationadjustmentf rom 63 ppmto + bq32000registersincludean OF 40 C to 85 C AmbientOperatingTemperature(oscillatorfa il) flag indicatingthe statusof the RTCoscillator,as well as a STOPbit that allowsthe host2 Applicationsprocessorto disablethe timeregisters GeneralConsumerElectronicsare normallyupdatedonceper second,and all theregistersare updatedat the sametimeto (1)PARTNUMBERPACKAGEBODYSIZE(NOM) bq32000 SOIC(8) x (1)

2 For all availablepackages,see the orderableaddendumatthe end of the IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand DECEMBER2008 Applicationand Pin Configurationand Deviceand Mechanical,Packaging,and RevisionHistoryNOTE:Pagenumbersfor previousrevisionsmay differfrompagenumbersin the (November2011)to RevisionEPage AddedESDR atingstable,FeatureDescriptionsection,De viceFunctionalModes,Applicationand Implementationsection,PowerSupplyRecomme ndationssection,Layoutsection,Deviceand DocumentationSupportsection,andMechanica l,Packaging,and AddedStorageTemperatureto ChangedVCC= 0 to VCCneedsa 2008 2015, DECEMBER2008 REVISEDAUGUST20155 Pin Configurationand FunctionsD Package8-PinSOICTop ViewPin serialinterfaceclockSDA5I/OI2C 2008 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback3 ProductFolderLinks.

3 Bq32000bq32000 SLUS900E DECEMBER2008 (1)overoperatingfree-airtemperaturerange (unlessotherwisenoted)MINMAXUNITVCCto GND ,VINAll otherpins to GND + ,TJ 40150 CStoragetemperature,Tstg 60150 C(1)Stressesbeyondthoselistedunderabsolu temaximumratingsmay causepermanentdamageto the stressratingsonly,and functionaloperationof the deviceat theseor any otherconditionsbeyondthoseindicatedunder recommendedoperatingconditionsis not absolute-maximum-ratedconditionsfor extendedperiodsmay (HBM),per ANSI/ESDA/JEDECJS-001,all pins(1)2000V(ESD)ElectrostaticdischargeV Chargeddevicemodel(CDM),per JEDEC specificationJESD22-C101,all500pins(2)(1 )JEDEC documentJEP155statesthat 500-VHBM allowssafe manufacturingwith a standardESDcontrolprocess.

4 (2)JEDEC documentJEP157statesthat 250-VCDM allowssafe manufacturingwith a ,VCCto 4085 CLCrystalload (unlessotherwisenoted) bq32000 THERMALMETRIC(1)D (SOIC)UNIT8 PINSR C/WR JC(top)Junction-to-case(top) C/WR C/W C/W JTJunction-to-boardcharacterizationparam eter55 C/W(1)For moreinformationabouttraditionaland new thermalmetrics,see theSemiconductorandICPackageThermalMetri csapplicationreport, 2008 2015, DECEMBER2008 (unlessotherwisenoted)PARAMETERTESTCONDI TIONSMINTYPMAXUNITPOWERSUPPLYICCVCC supplycurrent100 pulse(1), VBACK= 3 V, Oscillatoron, TA= 25 ALOGICLEVELINPUTSVILI nputlow VCCVVIHI nputhigh VCCVIINI nputcurrent0 V VIN VCC-11 ALOGICLEVELOUTPUTSVOLO utputlow voltageIOL= 3 AREAL-TIMECLOCKCHARACTERISTICSPre-calibr ationaccuracyVCC= V, VBACK= 3 V, Oscillatoron, TA= 25 C 35(2)ppm(1)The currentsmeasuredafterissuinga pulseon VCC.

5 The pulseamplitude0-VCC; pulsewidthmin 1 ms.(2)Typicalaccuracyis measuredusingreferenceboarddesignand boarddesignand crystalsectionresultsin TimingRequirementsSTANDARDMODEFASTMODEUN ITMINMAXMINMAX fsclI2C clockfrequency01000400kHztschI2C clockhigh stsclI2C clocklow stspI2C spiketime050050nstsdsI2C serialdatasetuptime250100nstsdhI2C serialdatahold time00nsticrI2C inputrise time100020 + (1)300nsticfI2C inputfall time30020 + (1)300nstocfI2C outputfall time30020 + (1)300 stbufI2C bus free ststsI2C ststhI2C Starthold stspsI2C stvd(data)Validdatatime (SCLlow to SDAvalid)11 stvd(ack)Validdatatime of ACK11 s(ACKsignalfromSCLlow to SDAlow)(1)Cb= total capacitanceof one bus line in pFCopyright 2008 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback5 (uA) ICC (uA) Vbackup (V) Icc (uA)Iback (uA)C001 VCC = 2 V (uA) ICC (uA) Vbackup (V) Icc (uA)Iback (uA)C002 VCC = V VCCSDASCLS tart ConditionSDASCLS tart ConditionStop Condition89tspsticfticrtsdhtvdtvdtbufD7/ Aticfticrtsdstsdststhtschtscl1/fscl1234b q32000 SLUS900E DECEMBER2008 I2C CurrentConsumptionvs BackupSupplyVoltageFigure3.

6 CurrentConsumptionvs BackupSupplyVoltage6 SubmitDocumentationFeedbackCopyright 2008 2015, kWVBACKOSCIOSCOUse onlysuper-capacitoror battery,not FGNDI2C RegisterInterface WithUndervoltageLockout32-kHzOscillatorT rickleChargeAutomaticBackupSwitchVCOREI nterruptGeneratorVCCVCCR egistersPlace supply-decouplingcapacitor near supply pin1 DECEMBER2008 REVISEDAUGUST20157 bq32000is a real-timeclockthat featuresan automaticbackupsupplywith an :All pullupresistorsshouldbe connectedto VCCsuchthat no pullupis FunctionThe IRQ pin of the bq32000functionsas a general-purposeoutputor a frequencytest functionofIRQ is configurablein the deviceregisterspaceby settingthe FT, FTF,and OUTbits.

7 On initialpowercycles,the OUTbit is set to one,and the FTFand FT bits are set to subsequentpower-ups,with backupsupplypresent,the OUTbit remainsunchanged,and the FTF and FT bits are set to ,the IRQ pin functionis pullupresistorshouldbe tied to VCCto preventIRQ operationwhenoperatingon effectof the calibrationlogicis not normallyobservablewhenIRQ isconfiguredto output1 Hz. The calibrationlogicfunctionsby periodicallyadjustingthe widthof the calibrationeffectis observableonly everyeightor sixteenminutes,dependingon the sign of the 2008 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback7 ProductFolderLinks:bq32000bq32000 SLUS900E DECEMBER2008 (continued)Figure4.

8 IRQ Pin FunctionalDiagramTable1. IRQ FunctionFTOUTFTFIRQ STATE1X11 Hz1X0512 Hz01X100X08 SubmitDocumentationFeedbackCopyright 2008 2015, AC KVR E FVCC 5 V/ms (max) AC KVR E FOn VBAC KOn VBAC KOn VC COn VC CVBACK> VREFVBACK> E FVB AC KOn VBAC KOn VC CVREF> E FVB AC KOn VBAC KOn VC CVREF> VBACKV oltageVoltageVoltageVoltageT imeT imeTimeTimeVCCVCCVCC 5 V/ms (max) DECEMBER2008 bq32000has an internalswitchovercircuitthat causesthe deviceto switchfrommainpowersupplytobackuppowersu pplywhenthe voltageof the mainsupplypin VCCdropsbelowa VBACK switchovercircuitusesan internalreferencevoltageVREF derivedfromthe on-chipbandgapreference; V. The deviceswitchesto the VBACK supplywhenVCCis less thanthe lesserof VBACKor ,the deviceswitchesto the VCCsupplywhenVCCis greaterthaneitherVBACKor resetto defaultvalueswhenthe RTCswitchesfrommainpowersupplyto the registerdefinitionsto determinewhatregisterbits are effectedby a backupswitchover(effectedbits havetheirresetvalue(1/0)shownfor 'Cycle',bits that are unchangedby backupare marked'UC').

9 The time keepingregisterscan take up to 1 secondto updateafterthe RTCswitchesfrombackuppowersupplyto SwitchoverDiagramCopyright 2008 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback9 ProductFolderLinks:bq32000940W20 kW180 WVBACKbq32000 SLUS900E DECEMBER2008 tricklechargecircuitto maintainthe chargeof the backupsupplywhena supercapacitoris tricklechargecircuitis implementedas a seriesof threeswitchesthat are independentlycontrolledby settingthe TCHE[3:0],TCH2,and TCFE bits in the [3:0]mustbe writtenas 0x5hand TCH2as 1 to closethe tricklechargeswitchesand enablechargingofthe backupsupplyfromVCC. Additionally,TCFEcan be set to 1 to bypassthe internaldiodeand boostthechargevoltageof the tricklechargeswitchesare openedwhenthe deviceis initiallypoweredon and eachtimethe deviceswitchesfromthe mainsupplyto the tricklechargecircuitisintendedfor use withsupercapacitors;however,it can be usedwitha takennot to overchargea the rechargeablebatteryor deviceswitchesfromthe mainpowersupplyto backupsupply,the TimekeepingregisterRegisters[0-9] cannotbe accessedvia the I2C.

10 The accessto theseregistersare only whenVCC> Timekeepingregisterscan takeup to 1 secondto updateafterthe deviceswitchesfrombackuppowersupplyto SerialInterfaceThe I2C interfaceallowscontroland monitoringof the RTCby a is a two-wireserialinterfacedevelopedby PhilipsSemiconductor(seeI2C-BusSpecifica tion, , January2000).The bus consistsof a dataline (SDA)and a clockline (SCL)with bus is idle,bothSDAand SCLlinesare masterdevice,usuallya microcontrolleror a digitalsignalprocessor,controlsthe generatingthe SCLsignaland masteralso generatesspecificconditionsthat indicatethe STARTand STOPof slavedevicereceivesand/ortransmitsdataon the bus undercontrolof the as a communicationis initiatedby a mastersendinga startcondition,a high-to-lowtransitionon the SDAI/O whileSCLis startcondition,the deviceaddressbyteis sent,most-significantbit (MSB)first,includingthe datadirectionbit (R/W).