Chapter 4 Junction Field Effect Transistor Theory and ...

1 Chapter 4. Junction Field Effect Transistor Theory and Applications _____. Introduction Like bipolar Junction Transistor , Junction Field Effect Transistor jfet is also a three-terminal device but it is a unipolar device, which shall mean that the current is made of either electron or hole carrier. The operation of jfet is controlled by electric Field Effect . Thus, jfet is a voltage-controlled current source device, whereas BJT is a current-controlled source device. There are two types of jfet namely n-channel and p-channel. n-channel type means the carrier type in the conducting channel is electron. Likewise, for p-channel type, the carrier type in conducting channel is hole. jfet has three terminals, which are gate G, drain D and source S. The gate is used to control the flow of carrier from source to drain. Source is the terminal that emits carrier and the drain is the terminal that receives carrier. The structures of n-channel and p-channel jfet are shown in Fig.

2 (a) n-channel jfet (b) p-channel jfet . Figure : The structures of n-channel and p-channel - 111 - 4 Junction Field Effect Transistor Theory and Applications The symbols of n-channel and p-channel JFETs are shown in Fig. (a) n-channel jfet (b) p-channel jfet . Figure : Symbols of n-channel and p-channel jfet . Biasing the jfet . In normal operation, the gate of jfet is always reverse-biased. Thus, an n- channel type, the gate is biased with negative voltage gate voltage is less than zero volt VG < 0, whilst for p-channel type, the gate is biased with positive voltage gate voltage is greater than zero voltage VG > 0. The source and drain are biased according to the channel type or carrier type. If it is an n-channel jfet (electron as carrier), the source is biased with negative voltage while the drain is biased with positive voltage. Alternatively, it can be biased such that the drain voltage VD is greater than the source voltage VS. VD > VS. If it is a p-channel jfet (hole as carrier), the source is biased with positive voltage while the drain is biased with negative voltage.

3 Alternatively, it can be biased such that the drain voltage VD is less than the source voltage VS. VD. < VS. Figure shows the bias condition for an n-channel jfet . - 112 - 4 Junction Field Effect Transistor Theory and Applications Figure : Bias connection for n-channel jfet . jfet Characteristics and Parameters Figure shows the drain current characteristics of a jfet for gate-to-source voltage equal to 0V. VGS = 0. Figure : jfet drain characteristics curve for VGS = 0. - 113 - 4 Junction Field Effect Transistor Theory and Applications Between point A and B, it is the ohmic region of the jfet . It is the region where the voltage and current relationship follows ohm's law. At point B, the drain current is at maximum for VGS = 0 condition and is defined as IDSS. It is the pinch-off point, where there is no increase of current as drain-to-source voltage VDS is further increased. The VDS voltage at this point is called pinch-off voltage VP. It is also the voltage point where drain-to-gate voltage VDG produces enough depletion thickness to narrow the channel so that the resistance of the channel will increase significantly.

4 Since VGS = 0, VDS is also equal to VDG. Thus, in general the pinch-off voltage Vp is Vp = VDS(P) - VGS ( ). where VDS(P) is the pinch-off drain-to-source voltage for a VGS value. IDSS and VP. are constant values listed by the manufacturer for a given jfet type, which are the drain current and pinch-off voltage at gate-to-source voltage VGS = 0. At point C, the jfet begins to breakdown where the ID increases rapidly and it is an irreversible breakdown. Different value of VGS produces different drain characteristic curve. For n- channel jfet , as VGS decreases, ID current and VDS(P) decreases. There is a VGS. value that no drain current ID is registered irrespective of the drain-source voltage VDS. This gate-to-source voltage VGS is the cutoff gate-to-source voltage VGS(off). Since there is no ID current, VDS must be zero. Thus, from equation ( ). VGS = -VP. Equation ( ) can also now be written as VDS(P) = VGS VGS(off). Figure : Drain characteristics of n-channel jfet of different VGS.

5 - 114 - 4 Junction Field Effect Transistor Theory and Applications At ohmic region of the drain characteristic curve for n-channel type follows equation ( ), which is W . I D = AqN D n E X = 2bqN D n VDS ( ). L . where A is the effective cross sectional area of the channel for a given VGS. voltage and b is the effective channel width for a given gate-to-source voltage and zero drain current. At gate-to-source voltage equals to zero volt VGS = 0. volt, the effective channel width b is equal to h. Thus, the channel on-resistance 1 L. is defined as rDS( on ) = . 2 hqN D n W. The pinch-off curve follows equation ( ), which is 2. V . ID = IDSS 1 DS( P ) ( ). VP . Figure shows the set-up for obtaining cut-off condition whereby the drain current ID is equal to zero. Figure : Condition for cutoff of an n-channel jfet . - 115 - 4 Junction Field Effect Transistor Theory and Applications Example For the jfet circuit shown in the figure, VP = and IDSS = (a). Determine the value of VDS when pinch-off begins.

6 (b) If the gate is grounded, what is the value of ID for VDD = when VDS is above pinch-off? Solution From the circuit, VGS = -5V and apply equation ( ), VDS(P) = VP + VGS. = 8V + (-5V). = 3V. The VDS voltage when pinch-off occurred is V. When the gate is grounded, VGS = 0V, the drain current ID is equal to IDSS =. 12mA. For any value of drain-to-source voltage VDS above pinch-off voltage of 8V, the drain current ID remains as IDSS = This is true as long as the drain-to-source voltage VDS is below breakdown voltage. Transfer Characteristics The transfer characteristic of an n-channel jfet is shown in Fig. At gate- to-source voltage VGS = 0, the drain current ID is equal to IDSS and at gate-to- source voltage VGS(off), drain current ID = 0. - 116 - 4 Junction Field Effect Transistor Theory and Applications Figure : Transfer characteristics curve of an n-channel jfet . The curve is a parabolic curve, which can be expressed mathematically as 2. VGS . I D = I DSS 1 ( ).

7 VGS( off ) . Forward Transconductance The forward transconductance gm of the jfet is defined as the change of drain current for a given change in gate-source voltage VGS and it is expressed as I D. gm = ( ). VGS. From the transfer characteristic curve, one will realize that the transconductance of the device is at maximum when VGS is at zero voltage. The value of gm at VGS. = 0 is always given in the manufacturer data sheet of the device, which is denoted as gm0. If gm0 is given, gm for a given VGS can be calculated from equation ( ). - 117 - 4 Junction Field Effect Transistor Theory and Applications VGS . g m = g m0 1 ( ). VGS( off ) . Equation ( ) can be derived from equation ( ) by differentiating drain current with respect to gate-to-source voltage dID/dVGS. dI D 2I DSS VGS . gm = = 1 ( ). dVGS VGS( Off ) VGS( off ) . Comparing equation ( ) and ( ), gm0 shall be 2I DSS. g m0 = ( ). VGS( off ). Thus, given the values of IDSS and VGS(off), the transconductance of the device at VGS = 0 can be determined.

8 From equation ( ) and ( ), transconductance gm can be expressed as g m = g m0 I D / I DSS ( ). Thus, the transconductance gm of jfet for a given drain current ID value, can be obtained. Input Impedance Since the gate of jfet is reverse-biased, the input impedance is very high. This is one advantage of jfet over bipolar Junction Transistor . In jfet data sheet, the input impedance is given by gate reverse current IGSS for a given gate-source voltage VGS. Thus, input impedance can be expressed as VGS. R IN ( gate ) = ( ). I GSS. dc Biasing jfet . The purpose of biasing the device is to select the right dc gate-to-source voltage for the jfet in order to establish a desired value of drain current. Listed here are some standard methods. - 118 - 4 Junction Field Effect Transistor Theory and Applications Self-Biasing of jfet . The self-biasing circuits for n-channel and p-channel jfet are shown in Fig. The gate of the jfet is connected to the ground via a gate resistor RG.

9 (a) n-channel jfet (b) p-channel jfet . Figure : Self-biasing of jfet . The gate voltage VG is closed to zero since the voltage dropped across RG by IGSS can be ignored. Thus, VGS = VG - VS ( ). From Fig. (a), VS = IDRS and VG = 0. VGS = 0V - IDRS. and VGS = + IDRS for p-channel jfet . The drain-source voltage VDS is VDS = VD -VS. = VDD - IDRD -IDRS. = VDD - ID(RD + RS) ( ). - 119 - 4 Junction Field Effect Transistor Theory and Applications As mentioned earlier, the purpose of biasing is to select the right dc gate-source voltage for the jfet to establish a desired value of drain current. Once it is established. The source resistance RS can be calculated using equation ( ). VGS. RS = ( ). ID. Example Determine the value of RS required to self-bias an n-channel jfet with IDSS =. 25mA, VGS(off) = -10V, VGS = -5V and its transconductance gm. Solution Drain current ID at gate-to-source VGS = -5V is 2. VGS 5V . 2. ID = IDSS 1 = 25mA 1 = VGS( off ) 10V . The source resistance RS is VGS 5V.

10 RS = = = 800 . ID 2I DSS 2 x25mA. Transconductance gm at VGS = 0, g m0 = = = 5mA / V. VGS( off ) 10V. Thus, the transconductance gm at ID = is, g m = g m0 I D / I DSS = 5mA / V 25mA = / V. Mid-point Bias The purpose of midpoint bias is to allow maximum drain current ID swing. From the drain transfer characteristic curve, the midpoint bias occurred at drain current ID corresponds to IDSS/2 and at approximately gate-to-source voltage VGS. equals to VGS(off)/4. Indeed when drain current equals to ID = IDSS/2, gate-to- source voltage is VGS = time of gate-to-source cutoff voltage VGS(off). The illustration is shown in Fig. - 120 - 4 Junction Field Effect Transistor Theory and Applications Figure : The transfer characteristic curve showing midpoint-bias values for jfet . Voltage Divider Bias An n-channel jfet with voltage-divider bias is shown in Fig. The voltage at the source of the jfet must be more positive than the voltage at the gate in order to keep the gate-source Junction reverse-biased.