Datasheet - STM32F205xx STM32F207xx - Arm®-based 32-bit ...

1 This is information on a product in full production. August 2016 DocID15818 Rev 151/184 STM32F205xx STM32F207xxARM - based 32-bit MCU, 150 DMIPs, up to 1 MB Flash/128+4KB RAM, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & cameraDatasheet - production dataFeatures Core: ARM 32-bit Cortex -M3 CPU (120 MHz max) with Adaptive real-time accelerator (ART Accelerator ) allowing 0-wait state execution performance from Flash memory, MPU, 150 DMIPS/MHz (Dhrystone ) Memories Up to 1 Mbyte of Flash memory 512 bytes of OTP memory Up to 128 + 4 Kbytes of SRAM Flexible static memory controller that supports Compact Flash, SRAM, PSRAM, NOR and NAND memories LCD parallel interface, 8080/6800 modes Clock, reset and supply management From to V application supply + I/Os POR, PDR, PVD and BOR 4 to 26 MHz crystal oscillator Internal 16 MHz factory-trimmed RC 32 kHz oscillator for RTC with calibration Internal 32 kHz RC with calibration Low-power modes Sleep, Stop and Standby modes VBAT supply for RTC, 20 32 bit backup registers, and optional 4 KB backup SRAM 3 12-bit.

2 S ADCs with up to 24 channels and up to 6 MSPS in triple interleaved mode 2 12-bit D/A converters General-purpose DMA: 16-stream controller with centralized FIFOs and burst support Up to 17 timers Up to twelve 16-bit and two 32-bit timers, up to 120 MHz, each with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input Debug mode: Serial wire debug (SWD), JTAG, and Cortex -M3 Embedded Trace Macrocell Up to 140 I/O ports with interrupt capability: Up to 136 fast I/Os up to 60 MHz Up to 138 5 V-tolerant I/Os Up to 15 communication interfaces Up to 3 I2C interfaces (SMBus/PMBus) Up to four USARTs and two UARTs ( Mbit/s, ISO 7816 interface, LIN, IrDA, modem control) Up to three SPIs (30 Mbit/s), two with muxed I2S to achieve audio class accuracy via audio PLL or external PLL 2 CAN interfaces ( Active) SDIO interface Advanced connectivity USB full-speed device/host/OTG controller with on-chip PHY USB high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII 8- to 14-bit parallel camera interface (48 Mbyte/s max.)

3 CRC calculation unit 96-bit unique IDLQFP64 (10 10 mm)LQFP100 (14 14 mm)LQFP144 (20 20 mm)LQFP176 (24 24 mm)UFBGA176 (10 10 mm)WLCSP64+2( mm pitch)&"'! Rev 15 Table 1. Device summaryReferencePart numbersSTM32F205xxSTM32F205RB, STM32F205RC, STM32F205RE, STM32F205RF, STM32F205RG STM32F205VB, STM32F205VC, STM32F205VE, STM32F205VF, STM32F205VG STM32F205ZC, STM32F205ZE, STM32F205ZF, STM32F205 ZGSTM32F207xxSTM32F207IC, STM32F207IE, STM32F207IF, STM32F207IG STM32F207VC, STM32F207VE, STM32F207VF, STM32F207VG STM32F207ZC, STM32F207ZE, STM32F207ZF, STM32F207 ZGDocID15818 Rev 153/184 STM32F20xxxContents6 Contents1 Introduction .. 132 Description .. compatibility throughout the family .. 183 Functional overview .. Cortex -M3 core with embedded Flash and SRAM.

4 Real-time memory accelerator (ART Accelerator ) .. protection unit .. Flash memory .. (cyclic redundancy check) calculation unit .. SRAM .. bus matrix .. controller (DMA) .. static memory controller (FSMC) .. vectored interrupt controller (NVIC) .. interrupt/event controller (EXTI) .. and startup .. modes .. supply schemes .. supply supervisor .. regulator .. ON .. OFF .. ON/OFF and internal reset ON/OFF availability .. clock (RTC), backup SRAM and backup registers .. modes .. operation .. and watchdogs .. timers (TIM1, TIM8) .. timers (TIMx) .. timers TIM6 and TIM7 .. 34 ContentsSTM32F20xxx4/184 DocID15818 Rev watchdog .. watchdog .. timer.

5 Circuit interface (I C) .. synchronous/asynchronous receiver transmitters (UARTs/USARTs) .. peripheral interface (SPI) .. sound (I2S) .. MAC interface with dedicated DMA and IEEE 1588 support .. area network (CAN) .. serial bus on-the-go full-speed (OTG_FS) .. serial bus on-the-go high-speed (OTG_HS) .. PLL (PLLI2S) .. camera interface (DCMI) .. random number generator (RNG) .. (general-purpose inputs/outputs) .. (analog-to-digital converters) .. (digital-to-analog converter) .. sensor .. wire JTAG debug port (SWJ-DP) .. Trace Macrocell .. 414 Pinouts and pin description .. 425 Memory mapping .. 676 Electrical characteristics .. conditions .. and maximum values .. values.

6 Curves .. capacitor .. input voltage .. supply scheme .. 70 DocID15818 Rev 155 consumption measurement .. maximum ratings .. conditions .. operating conditions .. external capacitor .. conditions at power-up / power-down (regulator ON) .. conditions at power-up / power-down (regulator OFF) .. reset and power control block characteristics .. current characteristics .. time from low-power mode .. clock source characteristics .. clock source characteristics .. characteristics .. spread spectrum clock generation (SSCG) characteristics .. characteristics .. characteristics .. maximum ratings (electrical sensitivity) .. current injection characteristics .. port characteristics.

7 Pin characteristics .. timer characteristics .. interfaces .. ADC characteristics .. electrical characteristics .. sensor characteristics .. monitoring characteristics .. reference voltage .. characteristics .. interface (DCMI) timing specifications .. MMC card host interface (SDIO) characteristics .. characteristics .. 1517 Package information .. package information .. +2 package information .. package information .. 156 ContentsSTM32F20xxx6/184 DocID15818 Rev package information .. package information .. +25 package information .. characteristics .. 1698 Ordering information .. 1709 Revision history .. 171 DocID15818 Rev 157/184 STM32F20xxxList of tables9 List of tablesTable summary.

8 2 Table features and peripheral counts .. 15 Table features and peripheral counts .. 16 Table ON/OFF and internal reset ON/OFF availability.. 31 Table feature comparison .. 33 Table feature comparison .. 36 Table used in the pinout table .. 46 Table pin and ball definitions .. 47 Table pin definition .. 58 Table function mapping .. 61 Table characteristics .. 71 Table characteristics .. 72 Table characteristics.. 72 Table operating conditions .. 72 Table depending on the operating power supply range .. 74 Table operating conditions .. 75 Table conditions at power-up / power-down (regulator ON) .. 76 Table conditions at power-up / power-down (regulator OFF).. 76 Table reset and power control block characteristics.

9 77 Table and maximum current consumption in Run mode, code with data processing running from Flash memory (ART accelerator enabled) or RAM .. 79 Table and maximum current consumption in Run mode, code with data processing running from Flash memory (ART accelerator disabled) .. 80 Table and maximum current consumption in Sleep mode .. 83 Table and maximum current consumptions in Stop mode .. 85 Table and maximum current consumptions in Standby mode .. 86 Table and maximum current consumptions in VBAT mode.. 86 Table current consumption .. 87 Table mode wakeup timings .. 89 Table external user clock characteristics.. 90 Table external user clock characteristics .. 90 Table 4-26 MHz oscillator characteristics .. 92 Table oscillator characteristics (fLSE = kHz).

10 93 Table oscillator characteristics .. 93 Table oscillator characteristics .. 94 Table PLL characteristics.. 95 Table (audio PLL) characteristics .. 96 Table parameters constraint .. 98 Table memory characteristics .. 100 Table memory programming .. 100 Table memory programming with VPP .. 101 Table memory endurance and data retention .. 101 Table characteristics .. 102 Table characteristics .. 103 Table absolute maximum ratings .. 103 Table sensitivities .. 104 Table current injection susceptibility .. 104 Table static characteristics .. 105 List of tablesSTM32F20xxx8/184 DocID15818 Rev 15 Table voltage characteristics .. 108 Table AC characteristics .. 108 Table pin characteristics .. 110 Table of TIMx connected to the APB1 domain.